Cadence Design System (CDNS) Stock News, May-Aug 2025

Cadence (Nasdaq: CDNS) has unveiled a breakthrough in power analysis technology through collaboration with NVIDIA. The new Cadence Dynamic Power Analysis (DPA) App, integrated with the Palladium Z3 Enterprise Emulation Platform, enables hardware-accelerated dynamic power analysis of billion-gate AI designs.

The technology achieves up to 97% accuracy while analyzing billions of cycles within hours, a task previously considered impossible with conventional tools. This innovation allows semiconductor developers to accurately predict power consumption under realistic conditions, enabling the creation of more energy-efficient AI and ML systems while accelerating time to market.

Mach42 has unveiled its breakthrough AI-powered Discovery Platform, integrated with Cadence's (NASDAQ:CDNS) Spectre Simulation Platform for analog circuit analysis. The solution combines proprietary AI algorithms, high-performance simulation engines, and cloud infrastructure to accelerate design space exploration and IP reuse validation.

The platform automatically processes design netlists and specifications, rapidly detecting out-of-spec violations while providing accurate package and PCB parasitics modeling. Through machine learning-based emulation technology, it enables designers to validate circuit performance across various operating conditions, including voltage, temperature, and process corners.

Cadence (NASDAQ: CDNS) reported strong Q2 2025 financial results, with revenue reaching $1.275 billion, marking a 20% year-over-year growth. The company achieved a non-GAAP operating margin of 42.8% and non-GAAP EPS of $1.65, both exceeding Q2 guidance.

Quarter-end backlog stood at $6.4 billion, with current remaining performance obligations of $3.1 billion. Despite facing temporary restrictions on exports to China, Cadence raised its 2025 outlook, projecting 13% revenue growth and a non-GAAP operating margin of 44%. The company recorded a one-time charge of $140.6 million related to settlements with the DOJ and BIS.

Notable business highlights include the launch of Cerebrus AI Studio and Millennium M2000 AI Supercomputer, with strong performance across Core EDA (16% growth), IP business (25% growth), and System Design & Analysis (35% growth).

Cadence (Nasdaq: CDNS) has achieved a significant technological breakthrough with the tapeout of the industry's first LPDDR6/5X memory IP system solution operating at 14.4Gbps - up to 50% faster than previous LPDDR DRAM generations.

The new solution includes an advanced PHY architecture and high-performance controller, supporting both LPDDR6 and LPDDR5X DRAM protocols. It's designed to meet increasing memory bandwidth demands for AI infrastructure, including LLMs and compute-heavy workloads. The system is already engaging with leading AI, HPC, and data center customers.

The solution supports traditional SoCs and multi-die architectures through Cadence's chiplet framework, offering flexibility for various markets including AI, mobile, consumer, enterprise HPC, and cloud data centers.

Cadence (Nasdaq: CDNS) has scheduled its second quarter 2025 financial results webcast for Monday, July 28, 2025, at 2:00 PM Pacific Time. The presentation will feature Dr. Anirudh Devgan, president and CEO, along with John Wall, senior vice president and CFO.

The webcast recording will be accessible on the company's investor relations website from 5:00 PM PT on July 28 until 5:00 PM PT on September 16, 2025.

Cadence announced an expanded collaboration with Samsung Foundry, featuring a new multi-year IP agreement and joint development initiatives. The partnership focuses on advancing AI-driven design solutions for Samsung's SF4X, SF5A, and SF2P process nodes, targeting AI data centers, automotive (including ADAS), and RF connectivity applications. Key developments include expanded memory and interface IP solutions, digital full flow certification for SF2P node, automated analog design migration from 4nm to 2nm, RF chip/package co-design capabilities, and enhanced 3D-IC power integrity analysis. The collaboration has achieved significant milestones, including 80-90% resolution of IR-drop violations in high-speed CPU chips and streamlined design processes for mmWave applications. The partnership aims to accelerate time to market for SoCs, chiplets, and 3D-ICs while enhancing designer productivity.

Cadence announced its collaboration with NVIDIA to provide optimized solutions for the world's first industrial AI cloud. The partnership enables European manufacturers to access Cadence's design tools optimized for NVIDIA Grace Blackwell platforms, including the Fidelity CFD Platform, Spectre X Simulator, Voltus IC Power Integrity Solution, and Innovus Implementation System. The solutions, running on NVIDIA's infrastructure of 10,000 Blackwell GPUs, offer up to 80X acceleration in solver performance. A notable success case is Ascendance, which achieved 20X faster simulation runtimes in aviation design. The collaboration also features the NVIDIA Omniverse Blueprint integration with Cadence Reality Digital Twin Platform for optimized AI factory operations. Additionally, Cadence introduced its Millennium M2000 Supercomputer, combining their software with NVIDIA CUDA-X libraries and Blackwell platform to accelerate silicon, system, and drug design workflows.

Cadence Design Systems (NASDAQ: CDNS) has announced that Senior Vice President and CFO John Wall will participate in a fireside chat at the BofA Securities 2025 Global Technology Conference. The presentation is scheduled for Tuesday, June 3, 2025, at 10:00 a.m. PDT.

The event will be accessible via live webcast on the company's website, and the recording will remain available for replay for 180 days through Cadence's investor relations page at cadence.com/cadence/investor_relations.

Cadence (CDNS) has unveiled the Tensilica NeuroEdge 130 AI Co-Processor (AICP), a new processor designed to complement neural processing units (NPUs) for AI applications. The processor delivers 30% area savings and over 20% reduction in dynamic power and energy while maintaining performance levels. The NeuroEdge 130 AICP features an extensible design compatible with various NPUs and is supported by the NeuroWeave Software Development Kit.

The processor is specifically designed for end-to-end execution of agentic and physical AI networks in automotive, consumer, industrial, and mobile SoCs. It includes VLIW-based SIMD architecture with configurable options and optimized ISA for non-NPU tasks. The product is currently available and is ISO 26262-ready for automotive applications.