Welcome to our dedicated page for Cadence Design System news (Ticker: CDNS), a resource for investors and traders seeking the latest updates and insights on Cadence Design System stock.
Cadence Design Systems, Inc. (Nasdaq: CDNS) is a software publisher focused on electronic design automation (EDA), design IP and system design and analysis, with a strong emphasis on AI and digital twins. The CDNS news feed highlights how the company’s computational software and Intelligent System Design™ strategy support semiconductor and systems companies across hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics.
Investors and industry followers can use this page to review company announcements on financial results, including quarterly earnings releases, backlog updates, margin disclosures and business outlooks, which Cadence distributes via press releases and related 8-K filings. These updates often include commentary from senior management and details on product and maintenance revenue, services revenue and non-GAAP metrics.
Cadence news also covers technology milestones and product introductions. Examples include LPDDR5X and LPDDR6 memory IP system solutions for AI training, inference and data center workloads, as well as announcements related to memory and interface IP for standards such as HBM, DDR5, PCIe, UCIe, UALink and high-speed Ethernet. Other releases describe the company’s Chiplet Spec-to-Packaged Parts ecosystem and Physical AI chiplet platform, developed in collaboration with partners like Arm and Samsung Foundry to support chiplet-based architectures for physical AI, data center and HPC applications.
Additional news items address strategic transactions and governance, such as the acquisition of Secure-IC, the planned acquisition of Hexagon’s design and engineering business, and board appointments including Dr. Luc Van den hove. Community-focused announcements, like the Cadence Giving Foundation’s multi-year commitment to expand the AI Hub at San José State University, provide insight into the company’s engagement with education and the broader AI ecosystem.
By following CDNS news, readers can track how Cadence’s EDA tools, design IP, AI and digital twin technologies evolve, how the company communicates its financial performance, and how strategic partnerships and acquisitions shape its role in semiconductor and system design. Bookmark this page to access an organized stream of Cadence press releases and related updates.
Cadence Design Systems (CDNS) reported strong Q4 and fiscal year 2024 results, with Q4 revenue reaching $1.356 billion, up from $1.069 billion in Q4 2023. The company achieved a record backlog of $6.8 billion and current remaining performance obligations (cRPO) of $3.4 billion.
Q4 highlights include GAAP operating margin of 33.7% and non-GAAP operating margin of 46.0%. For the full year 2024, revenue grew 13.5% to $4.641 billion with a non-GAAP operating margin of 42.5%. The company's IP business grew 28% year-over-year in Q4, while Core EDA grew 15%.
Looking ahead to 2025, Cadence expects revenue between $5.14-$5.22 billion and non-GAAP diluted EPS of $6.65-$6.75.
MediaTek has adopted Cadence's AI-driven Virtuoso Studio and Spectre X Simulator on NVIDIA's platform for its 2nm designs, achieving significant productivity improvements. The implementation has resulted in a 30% productivity gain in their design flow compared to previous versions.
Key achievements include up to 6X greater performance using Spectre X Simulator on NVIDIA Hopper GPUs while maintaining accuracy, and an additional 30% design productivity improvement through Virtuoso Studio's layout routing and placement tools. MediaTek has integrated its own AI-powered optimization algorithm using the Virtuoso ADE Suite for future product development.
The collaboration enables MediaTek to meet aggressive performance and turnaround time requirements for 2nm high-speed analog IP development, with enhanced throughput and efficiency through comprehensive automation features.
Cadence (CDNS) has announced a definitive agreement to acquire Secure-IC, a leading embedded security IP platform provider. The acquisition aims to enhance Cadence's expanding IP portfolio with Secure-IC's embedded security IP, solutions, evaluation tools, and services.
Secure-IC's customer base includes prominent companies like SK Hynix Memory Solutions America, Synaptics, Silicon Labs, and Faraday Technology. The company has completed over 500 successful projects worldwide and operates from its headquarters in Rennes, France, with eight additional offices globally.
The integration will combine Secure-IC's solutions (Securyzr™, Laboryzr™, and Expertyzr™) with Cadence's expertise in IP and subsystem design. The transaction is expected to close in the first half of 2025, subject to regulatory approvals and customary conditions. The acquisition is anticipated to be immaterial to revenue and earnings this year.
Cadence Design Systems (Nasdaq: CDNS) has announced its upcoming fourth quarter and fiscal year 2024 financial results webcast, scheduled for Tuesday, February 18, 2025, at 2:00 p.m. Pacific Time. The presentation will feature Dr. Anirudh Devgan, president and CEO, alongside John Wall, senior vice president and CFO.
The webcast recording will be accessible online from 5:00 p.m. Pacific Time on February 18, 2025, until 5:00 p.m. Pacific Time on March 17, 2025, through the company's investor relations website.
Cadence Design Systems highlighted its commitment to disability inclusion through its Abilities Inclusion Group initiatives. The company celebrated International Day of Persons with Disabilities with guest speaker Melissa Stockwell, a four-time Paralympian. The Abilities Inclusion Group, in partnership with the Cadence Giving Foundation, collaborated with Special Olympics Northern California to support athletic training for individuals with disabilities.
Christina Jamerson, Abilities Inclusion Group Lead and Demand Gen Director, participated in a panel discussion about workplace inclusion and outlined plans for 2025. The company organized resource fairs to promote employee resource groups (ERGs) and foster community engagement.
Cadence Design Systems (CDNS) has announced the appointment of Moshe Gavrielov to its board of directors, effective January 1, 2025. Gavrielov brings significant industry experience, currently serving on the boards of NXP Semiconductors and TSMC, and chairing Foretellix and SiMa.ai. He previously served as president and CEO of Xilinx from 2008 to 2018, where he led the company's transformation from an FPGA supplier to an 'All Programmable' solutions provider. Notably, Gavrielov has prior experience with Cadence, having served as executive vice president and general manager of its verification division from 2005 to 2007. The appointment aims to leverage his deep industry knowledge and ecosystem relationships to accelerate growth and enhance shareholder value in the AI era.
Cadence Design Systems (CDNS) announced a collaboration with Rapidus to develop co-optimized AI-driven reference design flows and IP portfolio supporting Rapidus' 2nm gate-all-around (GAA) process with backside power delivery network (BSPDN) technology. The partnership aims to address increasing design challenges in the semiconductor industry, focusing on power, performance, and area requirements.
The collaboration includes numerous Cadence solutions, such as Cerebrus Intelligent Chip Explorer, JedAI Solution, and various other digital and analog/mixed signal tools. Customers will have access to Cadence's interface and memory IP components, including HBM4, 224G SerDes, and PCIe 7.0.
AST SpaceMobile and Cadence Design Systems announced their collaboration to develop the AST5000 ASIC, a custom chip designed for space-based cellular broadband network accessible by everyday smartphones. The chip enables up to a tenfold improvement in satellite processing bandwidth and is a key component of AST SpaceMobile's BlueBird program. Using Cadence's tools, IP, and Palladium Emulation Platform, the AST5000 ASIC is designed to support up to 10,000 MHz of processing bandwidth per satellite with data speeds up to 120 Mbps, enabling voice calls, data, and video applications through space-based cellular broadband.
Cadence Design Systems (Nasdaq: CDNS) has announced that President and CEO Anirudh Devgan will participate in a fireside chat at the Nasdaq 51st Investor Conference, hosted in collaboration with Morgan Stanley. The event is scheduled for December 10, 2024, at 9:00 a.m. GMT.
The presentation will be accessible via live webcast on the company's website at cadence.com/cadence/investor_relations and will remain available for replay for 180 days following the event.
Cadence Design Systems is transforming hearing aid technology through advanced DSP solutions. The company's Tensilica HiFi and Fusion F1 DSP family offers low-power, high-performance solutions for modern hearing aids, addressing key challenges in the industry. With over 5% of the global population requiring hearing rehabilitation, Cadence's technology focuses on improving signal processing, noise reduction, and incorporating AI capabilities. The company has collaborated with GlobalFoundries, Hoerzentrum Oldenburg, and Leibniz University Hannover to develop SmartHeAP, the industry's first binaural hearing aid system-on-chip prototype.
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