Welcome to our dedicated page for Cadence Design Systems news (Ticker: CDNS), a resource for investors and traders seeking the latest updates and insights on Cadence Design Systems stock.
Cadence Design Systems (symbol: CDNS) is a leading provider of electronic design automation (EDA) software, semiconductor intellectual property (IP), and system design and analysis products. The company empowers engineers with cutting-edge tools for the design and verification of giga-scale, giga-hertz system-on-chips (SoCs) at the latest semiconductor processing nodes.
Cadence’s core offerings include custom/analog tools that aid in designing transistors, standard cells, and IP blocks essential for SoCs. Their digital tools automate the intricate design processes, ensuring high efficiency and accuracy. Additionally, Cadence provides comprehensive IC packaging and printed circuit board (PCB) tools that facilitate the design of complete boards and subsystems.
Expanding its portfolio, Cadence offers design IP and verification IP for a range of components, including memories, interface protocols, analog/mixed-signal parts, and specialized processors. The company also presents integrated hardware/software co-development platforms that support system-level design, making it a one-stop solution for various design needs.
Cadence's technology significantly contributes to building innovative products that connect the world. The convergence of semiconductor companies and system companies moving towards mutual integration is expanding Cadence’s customer base. This shift, along with the ongoing digitalization across industries, places Cadence in a strategic position to benefit from the growing demand for advanced EDA solutions.
Recent achievements and projects highlight Cadence’s commitment to innovation and excellence. Their end-to-end solutions cater to a broad range of industries, ensuring robust performance and high-quality designs. With a focus on sustainability and cutting-edge technology, Cadence continues to lead the market, fostering advancements in electronics design and automation.
For the latest updates and news on Cadence Design Systems, investors and interested parties can visit our StockTitan page dedicated to CDNS, which provides comprehensive and up-to-date information on their stock performance, events, and significant developments.
Cadence Design Systems has expanded its system IP portfolio with the Cadence Janus Network-on-Chip (NoC). This addition aims to address the increased complexity and data delivery challenges within and between silicon components in larger SoCs and disaggregated multi-chip systems. The Janus NoC enhances power, performance, and area (PPA) targets, reducing latency and freeing engineering resources for SoC differentiation. Leveraging Cadence's Tensilica RTL tools, the NoC allows for extensive simulation and emulation, aiding in architectural exploration and mitigating routing congestion and timing issues. The Janus NoC will be available in July 2024.
Cadence Design Systems has announced significant achievements in its partnership with Intel Foundry. The collaboration includes advancements in 3D-IC enablement, EDA flows, and IP development for Intel's 18A process nodes.
Key milestones include the availability of a complete EMIB 2.5D advanced packaging flow, enhancements to digital and custom/analog flows, and a comprehensive IP portfolio and PDKs across multiple nodes. Cadence’s AI-driven flows for Intel 18A technology enable efficient design and rapid time-to-market for complex AI-enabling semiconductors. The collaboration leverages Intel’s EMIB technology and advanced silicon capabilities to meet performance, power, and area (PPA) goals.
Cadence’s solutions include the Integrity 3D-IC Platform, Allegro X APD, Sigrity, Clarity 3D Solver, Pegasus Verification System, Virtuoso Studio, Cerebrus Intelligent Chip Explorer, Genus Synthesis Solution, Innovus Implementation System, Quantus Extraction Solution, Tempus Timing Solution, Voltus IC Power Integrity Solution, and Liberate Characterization. The partnership aims to deliver next-generation system innovations and support the development of high-performance computing and AI/ML applications.
Cadence Design Systems announced a collaboration with Samsung Foundry to advance AI and 3D-IC semiconductor design. This partnership focuses on optimizing Cadence.AI digital and analog tools for Samsung's advanced node SF2 GAA. The collaboration aims to minimize leakage power, enhance design flows, and accelerate time to market.
Key achievements include a 10% reduction in leakage power, certification of the Cadence backside implementation flow for SF2, and the success of a test chip using these technologies. Cadence’s 3D-IC technology now supports all of Samsung’s multi-die integration offerings, with innovations in thermal warpage analysis and system-level LVS.
Additionally, Cadence’s Virtuoso Studio and mmWave RFIC design flow have improved analog circuit process migration and the tapeout process for RF designs. Their Pegasus Verification System is now certified for Samsung’s 4nm and 3nm processes, enhancing signoff accuracy and runtime. Cadence’s IP portfolio supports next-gen AI designs, with advanced memory IP for GDDR7. This collaboration underscores a mutual commitment to delivering competitive, next-gen semiconductor solutions.
On June 11, 2024, John Wall, Senior VP and CFO of Cadence Design Systems (Nasdaq: CDNS), will participate in a fireside chat at the Nasdaq Investor Conference in partnership with Jefferies. This event, accessible via live webcast at 1:30 p.m. BST, will be archived and available for replay for 90 days on the Cadence website. Investors and analysts can gain insights from Wall's discussion on the company's financial strategies and performance. The event reflects Cadence's commitment to transparency and engagement with its investor community.
Cadence Design Systems has completed the acquisition of BETA CAE Systems International, a leading provider of multi-domain engineering simulation solutions. This acquisition enhances Cadence's system analysis portfolio, unlocking a multi-billion-dollar TAM opportunity in structural analysis. BETA CAE is known for its strong presence in the automotive, aerospace, industrial, and healthcare sectors, with annual revenue of around $90 million. Cadence forecasts BETA CAE to contribute approximately $40 million to its 2024 revenue. However, the transaction is expected to be dilutive by 12 cents per share in 2024 and become accretive in 2025 on a non-GAAP basis.
John Wall, Senior Vice President and CFO of Cadence Design Systems (Nasdaq: CDNS), will be presenting at the BofA Securities 2024 Global Technology Conference.
The fireside chat is scheduled for June 4, 2024, at 10:00 a.m. PDT and will be live-streamed via webcast.
The presentation will also be available for replay on the Cadence website for 90 days.
Anirudh Devgan, CEO of Cadence Design Systems (Nasdaq: CDNS), will participate in a fireside chat at the Bernstein 40th Annual Strategic Decisions Conference on May 30, 2024.
His presentation will be webcast live at 8:00 a.m. PDT and archived on the Cadence website for 90 days.
Interested parties can access the webcast and replay it at cadence.com/cadence/investor_relations.
Cadence Design Systems has partnered with Team4Tech for seven years, engaging in philanthropic projects to uplift communities in need. In Fall 2023, Cadence reunited with Women in Technology Uganda (WITU) to empower young Ugandan women through technology and entrepreneurship. A $25,000 impact grant supported this initiative.
A team of ten Cadence employees from various global offices collaborated on-site and virtually for three months. They divided into sub-teams to create a new website for job opportunities, organize a hackathon at a local high school, and build a Makerspace with advanced tech tools. This project emphasized sustainable impact through a train-the-trainer approach.
Volunteers reported personal and professional growth, fostering a deep connection with WITU's women. This initiative aligns with Cadence's core values of customer-centric innovation, decision-making amidst ambiguity, and a growth mindset.
Cadence remains committed to volunteer opportunities that promote leadership and professional development.
Cadence Design Systems and McLaren Racing have announced the winner of the Cadence McLaren F1 Racing Team CFD Student Challenge on May 17, 2024. The challenge sought to optimize the aerodynamic performance of an Imperial Front Wing (IFW) F1 race car. Mathieu Boyer from Cornell University emerged victorious, showcasing his skills in mechanical engineering and computational fluid dynamics. Boyer will begin his internship with Cadence and the US Fidelity CFD team this summer. The challenge aimed to nurture engineering talent by providing students with access to advanced technology and mentorship.
Anirudh Devgan, President and CEO of Cadence Design Systems, will speak at the 52nd Annual J.P. Morgan Global Technology Media and Communications Conference on May 21, 2024. The fireside chat will be webcast live at 8:30 a.m. PDT and archived on the Cadence website for 30 days. Investors can access the presentation at cadence.com/cadence/investor_relations.
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