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SEALSQ Adopts RISC-V the Open-Standard RISC-V Architecture; Achievement Aligns with Rising Global Demand for Edge-AI and Machine Learning Applications

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SEALSQ Corp (NASDAQ: LAES) has announced the adoption of RISC-V architecture, with engineering samples of its first Quantum Resistant chips expected in late 2024. This move aligns with growing demand for Edge-AI and machine learning applications, potentially contributing to RISC-V products' market share growth to 25% by 2030. SEALSQ's RISC-V technology offers benefits in decentralized semiconductor processing, including improved power efficiency and reduced reliance on large-scale cooling systems.

The open-standard nature of RISC-V allows for highly customizable processor designs, enabling SEALSQ to develop more energy-efficient processors tailored for AI, machine learning, and edge applications. This approach addresses the critical issue of power consumption in centralized AI processing, offering a more sustainable alternative to current high-energy-demand solutions used in data centers supporting AI applications.

SEALSQ Corp (NASDAQ: LAES) ha annunciato l'adozione dell'architettura RISC-V, con i campioni ingegneristici dei suoi primi chip resistenti ai quanti attesi per la fine del 2024. Questa mossa è in linea con la crescente domanda di applicazioni Edge-AI e machine learning, contribuendo potenzialmente alla crescita della quota di mercato dei prodotti RISC-V, che potrebbe arrivare al 25% entro il 2030. La tecnologia RISC-V di SEALSQ offre vantaggi nel processamento decentralizzato dei semiconduttori, inclusi migliori efficienza energetica e ridotto affidamento su sistemi di raffreddamento su larga scala.

La natura open-standard di RISC-V consente design di processori altamente personalizzabili, permettendo a SEALSQ di sviluppare processori più energy-efficient, su misura per AI, machine learning e applicazioni edge. Questo approccio affronta la critica questione del consumo energetico nell'elaborazione AI centralizzata, offrendo un'alternativa più sostenibile rispetto alle attuali soluzioni ad alta domanda energetica utilizzate nei data center che supportano applicazioni AI.

SEALSQ Corp (NASDAQ: LAES) ha anunciado la adopción de la arquitectura RISC-V, con muestras de ingeniería de sus primeros chips resistentes a los cuánticos que se espera estén disponibles a finales de 2024. Este movimiento se alinea con la creciente demanda de aplicaciones de Edge-AI y aprendizaje automático, contribuyendo potencialmente al crecimiento de la cuota de mercado de los productos RISC-V hasta el 25% para 2030. La tecnología RISC-V de SEALSQ ofrece beneficios en procesamiento descentralizado de semiconductores, incluyendo mayor eficiencia energética y una menor dependencia de sistemas de refrigeración a gran escala.

La naturaleza de estándar abierto de RISC-V permite el diseño de procesadores altamente personalizables, lo que capacita a SEALSQ para desarrollar procesadores más eficientes en energía adaptados para AI, aprendizaje automático y aplicaciones en el borde. Este enfoque aborda el problema crítico del consumo de energía en el procesamiento centralizado de AI, ofreciendo una alternativa más sostenible a las soluciones actuales de alta demanda energética utilizadas en centros de datos que soportan aplicaciones de AI.

SEALSQ Corp (NASDAQ: LAES)는 RISC-V 아키텍처 채택을 발표했으며, 첫 번째 양자 저항 칩의 엔지니어링 샘플은 2024년 말에 예상됩니다. 이 움직임은 Edge-AI 및 머신 러닝 애플리케이션에 대한 증가하는 수요와 일치하며, RISC-V 제품의 시장 점유율이 2030년까지 25%로 성장할 가능성이 있습니다. SEALSQ의 RISC-V 기술은 분산 반도체 처리에서의 이점을 제공하며, 이는 향상된 전력 효율성과 대규모 냉각 시스템에 대한 의존도를 줄이는 것을 포함합니다.

RISC-V의 개방형 표준 특성은 매우 사용자 정의 가능한 프로세서 디자인을 가능하게 하여 SEALSQ가 AI, 머신 러닝 및 엣지 애플리케이션에 맞춤화된 더욱 에너지 효율적인 프로세서를 개발할 수 있게 합니다. 이 접근 방식은 중앙 집중식 AI 처리의 전력 소비라는 중요한 문제를 해결하며, AI 애플리케이션을 지원하는 데이터 센터에서 사용되는 현재의 고에너지 요구 해결책에 대한 보다 지속 가능한 대안을 제공합니다.

SEALSQ Corp (NASDAQ: LAES) a annoncé l'adoption de l'architecture RISC-V, avec des échantillons d'ingénierie de ses premières puces résistantes aux quantiques attendues pour la fin de 2024. Ce mouvement s'aligne avec la demande croissante pour des applications d'Edge-AI et d'apprentissage automatique, pouvant potentiellement contribuer à la croissance de la part de marché des produits RISC-V à 25% d'ici 2030. La technologie RISC-V de SEALSQ offre des avantages en traitement décentralisé des semi-conducteurs, y compris une meilleure efficacité énergétique et une réduction de la dépendance vis-à-vis des systèmes de refroidissement à grande échelle.

La nature open-standard de RISC-V permet des conceptions de processeurs hautement personnalisables, permettant à SEALSQ de développer des processeurs plus écoénergétiques adaptés pour l'IA, l'apprentissage automatique, et les applications en périphérie. Cette approche aborde la question critique de la consommation d'énergie dans le traitement centralisé de l'IA, offrant une alternative plus durable aux solutions à forte demande énergétique actuellement utilisées dans les centres de données soutenant les applications d'IA.

SEALSQ Corp (NASDAQ: LAES) hat die Einführung der RISC-V-Architektur angekündigt, wobei die technischen Muster seiner ersten quantensicheren Chips für Ende 2024 erwartet werden. Dieser Schritt entspricht der wachsenden Nachfrage nach Edge-AI- und Machine-Learning-Anwendungen und könnte potenziell dazu beitragen, dass der Marktanteil von RISC-V-Produkten bis 2030 auf 25% wächst. Die RISC-V-Technologie von SEALSQ bietet Vorteile in der dezentralen Halbleiterverarbeitung, einschließlich verbesserter Energieeffizienz und reduzierten Abhängigkeiten von großflächigen Kühlsystemen.

Die offene Standardnatur von RISC-V ermöglicht hochgradig anpassbare Prozessorentwürfe, wodurch SEALSQ in der Lage ist, energiefreundlichere Prozessoren zu entwickeln, die auf KI, maschinelles Lernen und Edge-Anwendungen zugeschnitten sind. Dieser Ansatz adressiert das kritische Problem des Energieverbrauchs bei der zentralisierten KI-Verarbeitung und bietet eine nachhaltigere Alternative zu den derzeit in Rechenzentren verwendeten energieintensiven Lösungen, die KI-Anwendungen unterstützen.

Positive
  • SEALSQ is releasing engineering samples of Quantum Resistant chips in late 2024
  • Adoption of RISC-V architecture aligns with growing demand for Edge-AI and machine learning applications
  • RISC-V products' market share expected to grow to 25% by 2030
  • RISC-V technology offers improved power efficiency and reduced reliance on large-scale cooling systems
  • Customizable processor designs allow for more energy-efficient and tailored solutions
Negative
  • None.

SEALSQ's adoption of RISC-V architecture marks a significant shift in semiconductor design, aligning with the growing demand for Edge-AI and machine learning applications. This move positions SEALSQ to capitalize on the projected 25% market share for RISC-V products by 2030. The open-standard nature of RISC-V allows for highly customizable processor designs, enabling SEALSQ to develop more efficient chips tailored for specific tasks. This customization is important for optimizing performance in Edge-AI applications, where speed and efficiency are paramount.

The focus on decentralized processing is a game-changer, potentially reducing reliance on power-hungry centralized data centers. By processing data locally, these chips can significantly reduce energy consumption and the need for extensive cooling systems. This approach addresses the growing concern over the massive power consumption of AI processing, which currently rivals the energy usage of entire nations.

SEALSQ's strategic pivot to RISC-V architecture could potentially boost its market position and financial performance. The projected growth of RISC-V products to 25% market share by 2030 presents a substantial revenue opportunity. However, investors should note that the full impact may not be immediate, as engineering samples are slated for late 2024. The company's focus on quantum-resistant security in its chips adds a unique selling proposition, potentially commanding premium pricing in security-sensitive markets.

The emphasis on energy efficiency and sustainability aligns with growing ESG concerns, which could attract environmentally conscious investors and customers. This could lead to increased market share and potentially higher profit margins. However, the transition to new architecture may involve significant R&D costs in the short term, which investors should monitor in upcoming financial reports.

SEALSQ's adoption of RISC-V architecture is well-timed with market trends. The rising demand for Edge-AI and machine learning applications is driving a shift towards more efficient, decentralized computing solutions. This aligns perfectly with RISC-V's capabilities. The projected 25% market share for RISC-V products by 2030 indicates strong growth potential in this sector.

The focus on sustainability and energy efficiency taps into a critical market concern, especially given the escalating power consumption of AI processing. SEALSQ's approach could appeal to industries seeking to reduce their carbon footprint and energy costs. The emphasis on quantum-resistant security also positions the company well in the cybersecurity market, which is increasingly important across all sectors. However, SEALSQ will face competition from established players in the semiconductor industry and market education about the benefits of RISC-V may be necessary to drive adoption.

Geneva, Switzerland, Sept. 13, 2024 (GLOBE NEWSWIRE) -- For more information visit: https://riscv.org/news/2024/07/sealsq-risc-v-semiconductors-is-pioneering-sustainability-through-decentralized-processing/

SEALSQ Corp (NASDAQ: LAES) ("SEALSQ" or "Company"), a company that focuses on developing and selling Semiconductors, PKI and Post-Quantum technology hardware and software products, today announced that its adoption of the RISC-V architecture will come to fruition with the release of the engineering samples of its first Quantum Resistant chips in late 2024. This achievement reflects SEALSQ’s forward-thinking strategy, aligning with the rising global demand for Edge-AI and machine learning applications which will contribute to grow RISC V products market share up to 25% by 2030 according to research by Omdia.

As a result, the Company is driving a significant paradigm shift in the microchip industry. This shift is not just about the technology itself but also about how semiconductors are designed and utilized to meet emerging needs, particularly in decentralized computing and sustainable practices.

Decentralization and Sustainability: A New Approach
One of the most significant advantages of SEALSQ’s RISC-V technology is its impact on decentralized semiconductor processing. By decentralizing computational tasks across multiple devices, SEALSQ’s RISC-V chips offer several benefits. The most prominent of these is improved power efficiency, an increasingly important factor in today’s energy-conscious world.

Localized data processing reduces the need to transfer large amounts of information to centralized locations, cutting down the power required for data transmission. This, in turn, lowers the overall energy consumption of a system. Decentralized processing also allows devices to be optimized for specific tasks, minimizing energy waste and maximizing resource efficiency.

Moreover, decentralization presents another critical benefit: it reduces the reliance on large-scale cooling systems. Centralized data centers, operated by other companies for cloud-based AI services, generate immense heat, requiring powerful and energy-intensive cooling systems. In contrast, decentralized computing environments benefit from more natural and less energy-demanding cooling solutions. By adopting RISC-V, SEALSQ is positioned to lead in more sustainable chip design and deployment.

Customization and Efficiency Through RISC-V
The open-standard nature of RISC-V is a game-changer for SEALSQ. It allows for highly customizable processor designs that can be tailored to the specific needs of a task. This customization reduces unnecessary computational load, which in turn reduces power consumption and increases efficiency. SEALSQ is taking full advantage of this flexibility, developing processors that are more energy-efficient and better suited for the growing needs of AI, machine learning, and edge applications.

By eliminating non-essential functionalities from its Secure Microcontrollers, SEALSQ can deliver products that meet the exact needs of their clients while minimizing resource use. This tailored approach not only saves power but also enhances overall performance in specialized applications, particularly in Edge-AI, where speed and efficiency are paramount.

Addressing the Power Consumption Challenge
SEALSQ’s RISC-V technology addresses a critical issue facing the tech industry: the staggering power consumption of centralized AI processing. For instance, GPUs which are currently used for high-volume AI workloads, can consume up to 700W of power each—more than the average American household. As demand for these GPUs grows, their collective energy usage could equal that of a large city in the U.S., or even surpass the energy consumption of some smaller European nations.

To put things into perspective, current estimates suggest that data centers supporting AI applications have power demands comparable to those of the entire nation of Cyprus, according to Schneider Electric’s report from October 2023. SEALSQ’s decentralized, RISC-V-powered approach contributes to a more sustainable alternative to this rapidly growing energy consumption problem, positioning the company as a pioneer in eco-friendly semiconductor solutions.

SEALSQ: Leading Innovation in RISC-V
SEALSQ’s commitment to RISC-V is more than just a strategic business decision. It reflects the company’s broader mission to innovate in high-performance, secure microcontrollers SEALSQ’s RISC-V chips are designed to offer quantum-resistant security, addressing future cybersecurity challenges.

As SEALSQ continues to push the boundaries of what’s possible with open-standard technology, it is contributing to lead the microchip industry into a new era—one that prioritizes efficiency, sustainability, and security. Through its adoption of RISC-V, SEALSQ participates to revolutionize the semiconductor landscape, ensuring that it remains at the forefront of technological innovation.

About SEALSQ
SEALSQ focuses on selling integrated solutions based on Semiconductors, PKI and Provisioning services, while developing Post-Quantum technology hardware and software products. Our solutions can be used in a variety of applications, from Multi-Factor Authentication tokens, Smart Energy, Smart Home Appliances, Medical and Healthcare and IT Network Infrastructure, to Automotive, Industrial Automation and Control Systems.

Post-Quantum Cryptography (PQC) refers to cryptographic methods that are secure against an attack by a quantum computer. As quantum computers become more powerful, they may be able to break many of the cryptographic methods that are currently used to protect sensitive information, such as RSA and Elliptic Curve Cryptography (ECC). PQC aims to develop new cryptographic methods that are secure against quantum attacks. For more information, please visit www.sealsq.com.

Forward-Looking Statements
This communication expressly or implicitly contains certain forward-looking statements concerning SEALSQ Corp and its businesses. Forward-looking statements include statements regarding our business strategy, financial performance, results of operations, market data, events or developments that we expect or anticipates will occur in the future, as well as any other statements which are not historical facts. Although we believe that the expectations reflected in such forward-looking statements are reasonable, no assurance can be given that such expectations will prove to have been correct. These statements involve known and unknown risks and are based upon a number of assumptions and estimates which are inherently subject to significant uncertainties and contingencies, many of which are beyond our control. Actual results may differ materially from those expressed or implied by such forward-looking statements. Important factors that, in our view, could cause actual results to differ materially from those discussed in the forward-looking statements include the expected success of our technology strategy and solutions for IoMT Security for Medical and Healthcare sectors, SEALSQ's ability to implement its growth strategies, SEALSQ's ability to continue beneficial transactions with material parties, including a limited number of significant customers; market demand and semiconductor industry conditions; and the risks discussed in SEALSQ's filings with the SEC. Risks and uncertainties are further described in reports filed by SEALSQ with the SEC.

SEALSQ Corp is providing this communication as of this date and does not undertake to update any forward-looking statements contained herein as a result of new information, future events or otherwise.

Press and Investor Contacts

SEALSQ Corp.
Carlos Moreira
Chairman & CEO
Tel: +41 22 594 3000
info@sealsq.com
SEALSQ Investor Relations (US)
The Equity Group Inc.
Lena Cati
Tel: +1 212 836-9611 / lcati@equityny.com
Katie Murphy
Tel: +212 836-9612 / kmurphy@equityny.com

FAQ

When will SEALSQ (LAES) release engineering samples of its Quantum Resistant chips?

SEALSQ (LAES) plans to release engineering samples of its first Quantum Resistant chips in late 2024.

What is the expected market share growth for RISC-V products by 2030?

According to research by Omdia, RISC-V products' market share is expected to grow up to 25% by 2030.

How does SEALSQ's (LAES) RISC-V technology address power consumption challenges?

SEALSQ's RISC-V technology offers decentralized processing, which improves power efficiency and reduces reliance on energy-intensive cooling systems, addressing the high power consumption issues of centralized AI processing.

What are the main benefits of SEALSQ's (LAES) adoption of RISC-V architecture?

The main benefits include improved power efficiency, reduced reliance on large-scale cooling systems, customizable processor designs, and the ability to develop more energy-efficient solutions for AI, machine learning, and edge applications.

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