Cadence Collaborates with Arm to Jumpstart the Automotive Chiplet Ecosystem
- Collaboration between Cadence Design Systems and Arm to accelerate SDV innovation
- Chiplet-based reference design and software development platform for ADAS applications
- Scalable chiplet architecture and interface interoperability for industry-wide collaboration
- Complementary software stack development platform compliant with SOAFEE initiative software standard
- Accelerated time-to-market for hardware and software development in automotive electronics ecosystem
- None.
Insights
The collaboration between Cadence Design Systems and Arm to provide a chiplet-based reference design and software development platform is a significant development for the automotive industry, particularly in the realm of advanced driver assistance systems (ADAS) and software-defined vehicles (SDVs). The announcement highlights the trend towards more complex AI and software capabilities in vehicles, which necessitates a higher degree of interoperability and faster innovation cycles.
The introduction of this technology can potentially reduce the time-to-market for automotive manufacturers and suppliers, as it enables software development to commence even before the hardware is available. This 'shift-left' approach in development is a strategic move to streamline the process flow and address the rapid pace of automotive development. By providing a standard for chiplet interface interoperability, the collaboration is poised to address a critical bottleneck in the industry, potentially leading to a more efficient and collaborative ecosystem.
The use of virtual platforms and chiplets as enablers for automotive 3D-IC SoC developers is a noteworthy aspect of this collaboration. It indicates a shift towards modular design in semiconductor manufacturing, which can allow for greater customization and scalability in automotive applications. This could lead to a diversification of product offerings and potentially create new market opportunities for companies involved in the automotive electronics supply chain.
The strategic partnership between Cadence and Arm can be expected to have financial implications for both companies and their stakeholders. By combining Arm's Automotive Enhanced technologies with Cadence's IP and software stack development platform, the two companies are leveraging their respective strengths to create a comprehensive solution for the automotive industry. This collaboration may lead to increased revenue streams for both parties as they capitalize on the growing demand for more sophisticated automotive electronics.
Investors in the semiconductor and automotive sectors should monitor the adoption rate of the new chiplet-based reference design and software development platform. A high adoption rate can signal a competitive edge and could result in increased market share for Cadence and Arm. On the other hand, the success of this initiative also depends on the acceptance and implementation of the Scalable Open Architecture for Embedded Edge (SOAFEE) initiative software standard. If widely adopted, it could lead to a more cohesive industry standard, benefiting companies that are early adopters of the technology.
It is also important to consider the potential cost savings for automotive manufacturers, as the ability to develop software in parallel with hardware design could reduce development costs and time. This efficiency gain could translate into higher profit margins for those manufacturers and potentially lower costs for consumers, which could stimulate demand for new vehicle technologies and contribute to overall industry growth.
The announcement of a chiplet-based reference design and software platform tailored for ADAS and SDVs marks a technological advancement in the automotive sector. Chiplets represent a modular approach to system-on-chip (SoC) design, allowing different semiconductor functions to be developed separately and then integrated. The reference design aims to facilitate this integration by providing a scalable architecture and ensuring interface interoperability.
The use of Arm's Automotive Enhanced technologies and Cadence's IP, including the Neo NPU and UCIe for high-speed communication, indicates a focus on high-performance computing and AI capabilities within the automotive space. The NeuroWeave SDK and other software tools are part of a broader push towards machine learning solutions that can drive innovation in vehicle autonomy and driver assistance features.
For the industry, the move towards chiplets and virtual development platforms can be seen as a response to the increasing complexity and cost of monolithic SoC designs. By enabling a 'digital twin' of the hardware for software development, the initiative can potentially reduce the risk of costly design errors and accelerate the validation process. This aligns with the broader industry trend of 'shift-left' testing, where verification activities are performed earlier in the development cycle to identify and resolve issues sooner.
ADAS chiplet reference design and software development platform based on the latest Automotive Enhanced technologies from Arm accelerate time-to-market for SDVs
The solution is architected and built using the latest generation of Arm® Automotive Enhanced technologies and Cadence® IP. The complementary software stack development platform is provided as a digital twin of the hardware that is compliant with the Scalable Open Architecture for Embedded Edge (SOAFEE) initiative software standard, enabling software development to begin before hardware is available and allowing subsequent system integration validation. The combined solution speeds both hardware and software development, accelerating time-to-market.
The growing prevalence of ADAS and SDVs is driving the need for more complex AI and software capabilities, as well as greater levels of interoperability and collaboration in the automotive electronics ecosystem. Coupled with the need to quickly customize 3D-IC systems for a plethora of automotive applications, chiplets are an increasingly attractive solution. However, it’s crucial that chiplets from different IP providers work together seamlessly. In addition, the rapid pace of automotive development necessitates that 3D-IC system developers have a software development platform to shift left in the process flow while the IP and chiplets are still being designed.
The new solution architecture and reference design provide a standard for chiplet interface interoperability, addressing a critical industry need. The Cadence components of the solution include:
- Helium™ Virtual and Hybrid Studio for the rapid creation of virtual and hybrid platforms and Helium Software Digital Twin to support deployment at scale for software developers
- I/O IP solutions for industry-leading interface and memory protocols, including Universal Chiplet Interconnect Express™ (UCIe™) for high-speed chiplet-to-chiplet communication
- Comprehensive compute IP portfolio including advanced AI solution, the Neo™ neural processing unit (NPU) IP, the NeuroWeave™ software development kit (SDK) for machine learning (ML) solutions, and world-class DSP compute solutions
“The automotive industry is evolving rapidly and AI and software advancements are emphasizing a greater need to speed up development cycles,” said Dipti Vachani, senior vice president and general manager, Automotive Line of Business, Arm. “Together with critical ecosystem partners like Cadence, we’re enabling faster software and hardware development by bringing together a complete solution of design and verification technologies underpinned by the latest Automotive Enhanced technologies from Arm, allowing developers to start building for next-generation SDVs well before silicon is available in the market.”
“Reducing the overall system design workload and shifting hardware and software development left are both crucial to meet shrinking time-to-market windows when developing today’s increasingly complex SDVs. Virtual platforms and chiplets are both key enablers for automotive 3D-IC SoC developers,” said Paul Cunningham, senior vice president and general manager of the System Verification Group at Cadence. “Working closely with Arm, we are addressing key inefficiencies in both software and hardware development and verification processes, while catalyzing the multi-die chiplet ecosystem for automotive semiconductors.”
The virtual platform and component IP for the reference platform are available now for early adopters. For more information, read this blog or visit the software-defined vehicles webpage.
About Cadence
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications, including consumer, hyperscale computing, 5G communications, automotive, mobile, aerospace, industrial and healthcare. For nine years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.
© 2024 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere. Universal Chiplet Interconnect Express and UCIe are trademarks of UCIe Consortium. All other trademarks are the property of their respective owners.
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