Cadence Accelerates Hyperscale SoC Design with Industry’s First Verification IP and System VIP for CXL 3.0
Cadence Design Systems announces the launch of the first Verification IP (VIP) and System-Level VIP for the CXL 3.0 standard, enhancing testing and compliance in data center applications. The solution integrates with PCIe 6.0, using Cadence TripleCheck technology for effective verification. Additionally, the System VIP includes a Traffic Library for CXL and tools for performance analysis, addressing the latest CXL requirements. This release supports Cadence's broader verification flow and Intelligent System Design strategy, aiding early adopters in achieving efficient verification closure.
- First-to-market verification tools for CXL 3.0 enhance competitive edge.
- Integration with PCIe 6.0 offers a comprehensive solution for data center applications.
- Cadence TripleCheck technology improves verification efficiency and reliability.
- Broad verification flow supports various tools for efficient SoC design.
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Next-generation CXL VIP and System VIP tools provide faster path to testing and compliance with the latest standard
The Cadence VIP for CXL provides high-performance model implementation that allows designers to quickly and thoroughly complete functional verification with less effort and greater assurance that the design will operate as expected. The VIP for CXL features Cadence TripleCheck™ technology, which provides a specification-compliant verification plan linked to comprehensive coverage models and a robust test suite to ensure compliance with the specification.
The Cadence System VIP solution has also been expanded to address the latest CXL specification. The solution includes the
“CXL is a disruptive technology that is quickly evolving, and early adopters need the ability to verify and ensure compliance with the specification to achieve the fastest path to IP verification closure,” said
“CXL has become fundamental for hyperscale, data center, and cloud applications, and with the release of the CXL 3.0 specification, there is a need for tools that meet the latest requirements to ensure that early adopters can successfully build and verify their SoCs,” said
The new VIP solutions are part of the broader Cadence verification full flow, which includes Palladium® Z2 emulation, Protium™ X2 prototyping, Xcelium™ simulation, the Jasper™ Formal Verification Platform, the Helium™ Virtual and
About Cadence
Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For eight years in a row,
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Category: Featured
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