Welcome to our dedicated page for Arteris news (Ticker: AIP), a resource for investors and traders seeking the latest updates and insights on Arteris stock.
Arteris, Inc. (Nasdaq: AIP) is described in its press releases as a global leader in system IP used in semiconductors, with a focus on network-on-chip interconnect IP, system-on-chip integration automation software, and hardware security assurance technology. The AIP news feed on Stock Titan aggregates company announcements and third-party coverage that reflect how Arteris’ technology is applied across AI, automotive, data center, and edge computing markets.
Readers can expect news about product licensing wins and customer adoptions, such as agreements with Altera for FPGA and SoC FPGA solutions, Black Sesame Technologies for intelligent driving SoCs, Blaize for edge AI platforms, Axelera AI for AI inference platforms, and 2V Systems for data center IO chiplets. These items illustrate how Arteris’ Ncore, FlexNoC 5, FlexGen, and Magillem products are used to optimize data movement and integration in advanced SoC and chiplet-based designs.
The feed also features corporate and ecosystem updates, including collaborations with Alibaba DAMO Academy’s XuanTie RISC-V CPU IP group, participation in industry initiatives, and the acquisition of Cycuity, a provider of semiconductor cybersecurity assurance technology. In addition, investors will find financial results announcements and related commentary about metrics such as revenue, Annual Contract Value plus royalties, and Remaining Performance Obligations, as disclosed by the company.
By following the AIP news page, users can review how Arteris presents its role in accelerating semiconductor creation in the AI era, track new design wins and partnerships, and monitor official financial and strategic disclosures that the company releases through Globe Newswire and SEC-linked communications.
Arteris has joined the Intel Foundry Accelerator Ecosystem Alliance Program as a member of both the IP Alliance and Chiplet Alliance. This strategic partnership aims to support customers in designing electronics using Intel Foundry's advanced process technologies.
As a leading provider of system IP for system-on-chip (SoC) creation, Arteris will utilize its network-on-chip (NoC) IP and SoC integration automation technologies to ensure efficient design and integration of interconnects in SoCs and multi-die systems.
The collaboration focuses on optimizing performance, power, and area (PPA) while enabling interoperability in the chiplet ecosystem. Intel Foundry welcomes Arteris' NoC IP technology expertise, which will help accelerate backend convergence and silicon deployment for joint customers.
Arteris (Nasdaq: AIP), a leading provider of system IP for system-on-chip (SoC) creation, has scheduled its first quarter 2025 financial results announcement for Tuesday, May 13, 2025, after market close. The company will host a conference call at 4:30 PM ET on the same day to discuss the results.
Interested parties can join the call via US/Canada toll-free number (+1-800-717-1738) or international toll number (+1-646-307-1865). A live webcast will be available on the company's investor relations website, with a replay accessible for approximately 30 days after the call.
Arteris (Nasdaq: AIP) announced that Nextchip has licensed Arteris' FlexNoC 5 interconnect IP with Functional Safety for their EFREET1 automotive vision project. The network-on-chip technology will support Nextchip's development of semiconductor designs for Advanced Driver Assistance Systems (ADAS) and Image Signal Processors (ISP).
Nextchip, known for high-quality viewing cameras optimized for various conditions, selected Arteris for its proven track record in automotive technology. The FlexNoC 5 solution offers low power consumption, enhanced performance, and area efficiency, along with physical awareness features and Functional Safety options that help engineering teams optimize the design process.
Arteris (Nasdaq: AIP) has announced the immediate release of its next-generation Magillem Registers technology for SoC integration automation. The solution integrates Magillem 5 and Semifore CSRCompiler products into a unified platform for register management and Hardware/Software Interface automation.
Key improvements include up to 3x faster performance and 5x increased scalability compared to previous versions, supporting designs from IoT devices to complex AI SoCs. The product reduces hardware/software integration development time by 35% versus in-house solutions and features over 1,000 semantic and syntactic checks to reduce silicon failure risk.
The release expands standards support to include IEEE 1685-2022 (IP-XACT) and SystemRDL 2.0, enhancing IP reuse and third-party compatibility. The platform serves as a single source of truth for specifying, documenting, implementing, and verifying SoC address maps.
Arteris (Nasdaq: AIP) has introduced FlexGen, a revolutionary smart network-on-chip interconnect IP that significantly enhances semiconductor design efficiency. The technology delivers up to 10x productivity boost in chip development, reducing design iterations from weeks to days.
Key technical achievements include up to 30% reduction in wire length for lower power consumption and up to 10% reduction in latency for improved SoC and chiplet performance. FlexGen's AI-driven automation reduces manual adjustments by over 90%, enabling optimized NoC topology creation in hours instead of days.
Dream Chip Technologies has successfully implemented FlexGen in their Zukimo 1.1 automotive ADAS SoC, reporting significant improvements in design efficiency and quality. AMD has also expressed interest in the technology for their next-generation product innovation.
Arteris (AIP) reported strong Q4 2024 financial results, with revenue reaching $15.5 million, up 24% year-over-year. The company achieved record Annual Contract Value plus royalties of $65.1 million, a 16% increase year-over-year.
For full-year 2024, revenue grew 8% to $57.7 million. The company reported a net loss of $33.6 million ($0.86 per share) and a non-GAAP net loss of $16.9 million ($0.43 per share).
Business highlights include signing 14 new customers, including two major automotive OEMs, and expanding partnerships with top technology and automotive semiconductor companies. The company provided FY2025 guidance projecting revenue between $66.0-$70.0 million and ACV plus royalties of $73.0-$77.0 million.
Arteris Inc. (Nasdaq: AIP), a leading provider of system IP for SoC creation, has scheduled its fourth quarter and full year 2024 financial results announcement for Tuesday, February 18, 2025, after market close. The company will host a conference call at 4:30 PM ET on the same day to discuss the results.
Interested parties can join the call via phone using the toll-free number +1-800-717-1738 (US/Canada) or international toll number +1-646-307-1865. A live webcast will be available on the company's investor relations website, with a replay accessible for approximately 30 days after the call.
Arteris (Nasdaq: AIP), a system IP provider specializing in system-on-chip (SoC) creation, has announced the granting of 80,000 restricted stock units (RSUs) to four new employees. The grants were made as inducement awards under the company's 2022 Employee Inducement Incentive Plan, in compliance with Nasdaq Listing Rule 5635(c)(4). The RSU grants were approved by the board of directors with an effective date of January 23, 2025.
Arteris (Nasdaq: AIP) announced that Menta has implemented Arteris network-on-chip (NoC) IP in their MOSAICS-LP chiplet platform. The NoC technology addresses performance and area efficiency challenges in Menta's edge and IoT computing platform, particularly for AI applications.
Menta, a provider of eFPGA IP technology, utilizes the MOSAICS-LP platform with an adaptable architecture for edge AI computing. The implementation of Arteris' NoC IP enables efficient scaling and streamlined design processes while achieving required performance and area targets. The technology automates interconnect design tasks, reducing development time, optimizing power consumption, and minimizing die area.