Arteris and MIPS Partner on High-Performance RISC-V SoCs for Automotive, Datacenter and Edge AI

Rhea-AI Summary

Arteris (Nasdaq: AIP) and MIPS have announced a partnership to provide a pre-verified reference platform for RISC-V-based SoC designs. The collaboration integrates Arteris' network-on-chip IP, including Ncore cache coherent NoC IP and FlexNoC IP, with MIPS P8700 processor core clusters. This partnership aims to reduce development cycles and risk for chip designs in automotive, enterprise computing, and edge AI applications. The solution supports both homogeneous and heterogeneous architectures, handling AMBA ACE and CHI protocols simultaneously.

Positive

• Partnership reduces development time and risk for RISC-V-based chip designs
• Pre-verified solution enhances product reliability and customer confidence
• Expands market reach in automotive, enterprise computing, and edge AI sectors

Negative

• None.

Pre-verified reference platform supports the acceleration of RISC-V-based SoC designs with mutual customers

CAMPBELL, Calif., Nov. 12, 2024 (GLOBE NEWSWIRE) -- November 12, 2024 – Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP which accelerates system-on-chip (SoC) creation and MIPS, a leading provider of efficient and configurable compute core IP, today announced a partnership to provide a pre-verified reference platform to support mutual customers. The creation of this pre-verified reference platform is designed to shorten development cycles and reduce risk for RISC-V-based chip designs for automotive, enterprise computing and edge AI applications.

MIPS develops high-performance RISC-V CPU IP for AI, automotive and general-purpose computing. By pre-integrating Arteris network-on-chip IP, including Ncore cache coherent NoC IP and FlexNoC IP with the MIPS P8700 processor core clusters, the two IP providers demonstrate the interoperability and performance of the joint solution. Customers can confidently leverage the silicon-proven solution demonstrated by a pre-verified reference platform supported by both Arteris and MIPS.

Arteris network-on-chip IP technology provides on-die or on-chip connectivity, supporting both homogeneous and heterogeneous architectures, and can simultaneously handle AMBA ACE and CHI protocols. This unique flexibility and configurability facilitate quick development and optimized RISC-V-based SoCs.

“We are pleased to work with Arteris, whose Ncore and FlexNoC IPs have been deployed by our customers. This partnership allows us to deliver a pre-verified solution that mitigates risk and accelerates our customers' design time,” said Drew Barbier, VP of product at MIPS. “Many of our shared customers have successfully deployed our technologies, and this partnership enables us to better meet the demands of advanced automotive and general-purpose applications.”

“We are excited to support MIPS in the development of their next-generation RISC-V processor cores and support our mutual customers with this pre-verified solution,” said Michal Siwinski, CMO of Arteris. “This partnership underscores our commitment to support the broader ecosystem by delivering RISC-V ready NoC interconnects that not only enhance performance and reduce SoC power, but also improve scalability for future electronic innovations.”

For additional information about MIPS, please visit mips.com. For additional information about Arteris’ RISC-V ecosystem support, please visit www.arteris.com/solutions/risc-v.

About Arteris

Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today’s electronic systems. Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next. Learn more at arteris.com.

About MIPS

MIPS is accelerating compute density in the automotive, cloud and embedded markets. Giving customers the freedom to build unique products for specific workloads, MIPS’ industry-leading cores are configurable, efficient and easy to implement. Its multi-threading methodology delivers advanced scalability and the ability to efficiently move and process data faster. The company’s compute DNA spans three decades with billions of MIPS-based chips shipped to date. For more information, visit MIPS.com.

© 2004-2024 Arteris, Inc. All rights reserved worldwide. Arteris, Arteris IP, the Arteris IP logo, and the other Arteris marks found at https://www.arteris.com/trademarks are trademarks or registered trademarks of Arteris, Inc. or its subsidiaries. All other trademarks are the property of their respective owners.

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FAQ

What is the purpose of Arteris (AIP) and MIPS partnership announced in November 2024?

The partnership aims to provide a pre-verified reference platform that reduces development cycles and risk for RISC-V-based chip designs in automotive, enterprise computing, and edge AI applications.

What technologies are being integrated in the Arteris (AIP) and MIPS collaboration?

The collaboration integrates Arteris' Ncore cache coherent NoC IP and FlexNoC IP with MIPS P8700 processor core clusters.

What markets will the Arteris (AIP) and MIPS partnership target?

The partnership targets the automotive, enterprise computing, and edge AI applications markets with their RISC-V-based SoC designs.