Analog Devices’ RadioVerse® SoC Drives 5G Radio Efficiency and Performance
Analog Devices, Inc. (NASDAQ: ADI) has introduced a new RadioVerse System-on-Chip (SoC) series aimed at enhancing 5G radio units (RUs). The ADRV9040, the first in this series, features advanced RF signal processing, expands digital functionality, and significantly improves energy efficiency. Collaborating with Samsung, ADI's SoC aims to meet the growing demand for energy-efficient RUs. The new SoCs optimize the entire radio solution and reduce costs while enhancing performance, enabling operators to deploy more efficient 5G networks.
- Introduction of the ADRV9040 SoC significantly enhances energy efficiency for 5G RUs.
- The SoC integrates advanced algorithms and digital signal processing, reducing system size, weight, power, and cost.
- Strong collaboration with Samsung to support 5G deployment, indicating market confidence.
- None.
Analog Devices’ RadioVerse™ SoC Drives 5G Radio Efficiency and Performance (Graphic: Business Wire)
“Samsung and ADI have long worked together to support the swift deployment of 5G in the global market,” said
Demand for power efficient RUs is expanding rapidly as global network operators race to deploy 5G infrastructure. With the exponential growth of wireless demand, energy efficiency is a key metric for operators as they seek to reduce their carbon footprint while expanding network capacity. The new RadioVerse SoC series requires very low power compared to alternatives and implements advanced algorithms that deliver optimal RU system efficiency.
“RadioVerse SoCs are designed to optimize the full radio solution rather than just a single component or interface,” said
The ADRV9040 is the first in the new RadioVerse SoC series. It offers eight transmit and receive channels of 400MHz bandwidth and integrates advanced digital signal processing functions, including carrier digital up-converters (CDUC), carrier digital down-converters (CDDC), crest factor reduction (CFR) and digital pre-distortion (DPD). This expanded signal processing can eliminate the need for a field-programmable gate array (FPGA), thereby reducing thermal footprint, and total system size, weight, power, and cost. The SoC’s DPD algorithms were developed using advanced machine learning techniques and are optimized in close collaboration with major power amplifier (PA) vendors to ease the design burden and deliver best-in-class wide bandwidth performance. The algorithms are fully tested and validated across 4G and 5G use cases, including various PA technology types such as gallium nitride (GaN). In addition, the ZiF radio architecture simplifies RF filtering and signal chain components, reducing RU cost and development time for band and power variants designs.
- Learn more about the ADRV9040 RadioVerse SoC at http://www.analog.com/ADRV9040
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