Welcome to our dedicated page for Cadence Design System news (Ticker: CDNS), a resource for investors and traders seeking the latest updates and insights on Cadence Design System stock.
Cadence Design Systems, Inc. (Nasdaq: CDNS) is a software publisher focused on electronic design automation (EDA), design IP and system design and analysis, with a strong emphasis on AI and digital twins. The CDNS news feed highlights how the company’s computational software and Intelligent System Design™ strategy support semiconductor and systems companies across hyperscale computing, mobile communications, automotive, aerospace, industrial, life sciences and robotics.
Investors and industry followers can use this page to review company announcements on financial results, including quarterly earnings releases, backlog updates, margin disclosures and business outlooks, which Cadence distributes via press releases and related 8-K filings. These updates often include commentary from senior management and details on product and maintenance revenue, services revenue and non-GAAP metrics.
Cadence news also covers technology milestones and product introductions. Examples include LPDDR5X and LPDDR6 memory IP system solutions for AI training, inference and data center workloads, as well as announcements related to memory and interface IP for standards such as HBM, DDR5, PCIe, UCIe, UALink and high-speed Ethernet. Other releases describe the company’s Chiplet Spec-to-Packaged Parts ecosystem and Physical AI chiplet platform, developed in collaboration with partners like Arm and Samsung Foundry to support chiplet-based architectures for physical AI, data center and HPC applications.
Additional news items address strategic transactions and governance, such as the acquisition of Secure-IC, the planned acquisition of Hexagon’s design and engineering business, and board appointments including Dr. Luc Van den hove. Community-focused announcements, like the Cadence Giving Foundation’s multi-year commitment to expand the AI Hub at San José State University, provide insight into the company’s engagement with education and the broader AI ecosystem.
By following CDNS news, readers can track how Cadence’s EDA tools, design IP, AI and digital twin technologies evolve, how the company communicates its financial performance, and how strategic partnerships and acquisitions shape its role in semiconductor and system design. Bookmark this page to access an organized stream of Cadence press releases and related updates.
Cadence Design Systems (NASDAQ: CDNS) has announced an extended collaboration with Arm to enhance mobile device silicon development using Cadence's digital and verification tools. This collaboration introduces the Arm Total Compute Solutions 2022 (TCS22), which includes Cortex-A715 and Cortex-X3 CPUs and Mali-G715 and Immortalis-G715 GPUs. Cadence provides optimized RTL-to-GDS digital flow Rapid Adoption Kits (RAKs) for 5nm and 7nm nodes, improving productivity and achieving power, performance, and area goals, while also enhancing verification throughput for customers.
Cadence Design Systems has joined the Intel Foundry Services (IFS) Cloud Alliance, enhancing access to its design tools and Intel's advanced technologies in a secure cloud environment. This partnership allows customers to utilize Cadence's extensive cloud portfolio, improving efficiency and reducing time to market. The collaboration aims to benefit various sectors, including 5G, automotive, and AI, by enabling scalable design solutions and flexible business models. Cadence's expertise in electronic design automation will accelerate innovation for IFS customers.
Cadence Design Systems (CDNS) announced that its PCI Express 5.0 PHY and Controller IP has passed PCI-SIG certification tests at the first compliance event in April. The solutions achieved a speed of 32GT/s, aimed at SoC designs for hyperscale computing and networking. This certification enhances Cadence's position as a provider of power-efficient SoCs, aiding in faster market delivery. Key partnerships with TSMC and Intel further bolster their technological reputation. The PCIe 5.0 Design Kits are now available for licensing on TSMC N7, N6, and N5 processes.
Cadence Design Systems has announced an accelerated share repurchase (ASR) agreement with Royal Bank of Canada, aiming to buy back $100 million of its common stock. The initial delivery will include approximately 489,000 shares, with the remainder to be settled in the third quarter of 2022. The total number of shares repurchased will depend on Cadence’s daily volume-weighted average share prices during the ASR term, adjusted for a discount. This buyback is expected to enhance shareholder value and indicate confidence in Cadence's future.
Cadence Design Systems has announced a collaboration with TSMC to enhance innovation in mobile, 5G, and wireless applications through the N6RF design enablement. The newly developed process design kit (PDK) is aiding mutual customers in utilizing the Cadence RFIC solutions. This partnership optimizes several tools, including the Cadence Virtuoso Schematic Editor, facilitating effective design processes and improving performance, power efficiency, and reliability. The collaboration aims to streamline the design flow, aiding clients in reaching productivity goals faster.
Cadence Design Systems (CDNS) announced significant adoption of its Design IP portfolio by major semiconductor companies, leveraging TSMC’s advanced 5nm process technology. The portfolio supports various applications, including HPC and AI/ML, featuring high-performance interface standards like PCIe 6.0 and GDDR6. Cadence aims to facilitate faster time-to-market and first-pass silicon success through robust system interoperability and comprehensive integration. The collaboration with TSMC enhances innovation and performance in SoC designs.
Cadence Design Systems (Nasdaq: CDNS) has announced the certification of its digital and custom/analog design flows for TSMC's N3E and N4P processes. This collaboration aims to enhance design innovation in mobile, AI, and hyperscale computing. Customers are actively using the new N3E and N4P PDKs, with several test chips already completed. Cadence's solutions are designed to optimize power, performance, and area (PPA), enhancing engineering productivity. The company's Intelligent System Design strategy supports SoC design excellence across various market segments.
Cadence Design Systems, Inc. (NASDAQ: CDNS) reported accelerated customer adoption of its Cadence Cerebrus Intelligent Chip Explorer, leveraging AI to optimize digital chip design. MediaTek and Renesas achieved significant production benefits: MediaTek reduced die area by 5% and power by over 6%, while Renesas improved performance with a 75% improvement in total negative slack on an advanced-node CPU design. This AI-driven technology enhances power, performance, and area (PPA), streamlining engineering productivity and reducing time to tapeout.
Cadence Design Systems has launched Cadence OnCloud, the first SaaS and e-commerce platform tailored for a cloud-first approach in electronic design. Leveraging Amazon Web Services, it offers instant access to design tools via an online platform, catering to users with varied needs. Key features include credit card and ACH purchasing options, a comprehensive suite of design and analysis solutions, and the ability to scale resources according to project demands. This platform aims to enhance productivity and collaboration while minimizing on-premises infrastructure costs.
Cadence Design Systems has launched the Optimality Intelligent System Explorer, enhancing multi-disciplinary analysis and optimization for electronic systems. This new technology promises to deliver optimized designs up to 10X faster than traditional methods and offers even greater speed advantages on specific designs. It integrates AI capabilities similar to Cadence Cerebrus, providing industry-leading accuracy and efficiency. The software is currently available to select clients, with broader availability expected in Q4 2022.