Renesas Expands RZ/V Series with Built-in Vision AI Accelerator for Accurate Image Recognition and Multi-Camera Image Support
Renesas Electronics Corporation (TSE: 6723) has launched the RZ/V2MA microprocessor, enhancing AI processing for image recognition applications. This device features dual 64-bit Arm Cortex-A53 cores, operating at up to 1GHz, and a low-power DRP-AI accelerator achieving 1 TOPS/W performance. The RZ/V2MA supports high-speed interfaces for multiple external camera inputs and integrates an OpenCV accelerator for real-time image processing. Development tools like the DRP-AI TVM compiler extend compatibility with various AI models, solidifying Renesas' position in the embedded systems market.
- Launch of RZ/V2MA microprocessor enhances AI capabilities.
- Dual 64-bit Arm Cortex-A53 cores improving performance with 1GHz frequency.
- Low-power DRP-AI accelerator offers 1 TOPS/W performance.
- High-speed interfaces (Ethernet, USB, PCI Express) for multiple camera inputs.
- Integration of OpenCV accelerator for advanced image processing.
- Support for various AI models through DRP-AI TVM tool.
- None.
New RZ/V2MA MPU Features an OpenCV Accelerator for Image Processing and Offers TVM-based Deep Learning Compiler
(Graphic: Business Wire)
The RZ/V2MA device offers high-speed interfaces such as Ethernet, USB, and PCI Express that allow image input from multiple external cameras. In addition to the DRP-AI accelerator, the RZ/V2MA includes an OpenCV accelerator that allows rule-based image processing simultaneously. These features bring highly accurate image recognition capabilities for machine vision products such as AI-equipped gateways, video servers, security gates, POS terminals and robotic arms.
The new RZ/V2MA offers a full suite of development tools to aid vision AI system design. In addition to the existing DRP-AI Translator, the new device adds DRP-AI TVM (Note 1), which is based on the open-source deep learning compiler Apache TVM technology (Note 2). While DRP AI Translator is designed to convert AI models into DRP-AI executables, the DRP-AI TVM compiler lets the DRP-AI accelerator work together with the CPU, allowing DRP-AI to convert and generate more AI models than ever before. As a first phase, Renesas supports ONNX and PyTorch AI models and plans to support Tensorflow in the future.
"One of the challenges for embedded systems developers who want to implement machine learning is to keep up with the latest AI models that are constantly evolving,” said
"Renesas' RZ/V series is ideal for embedded devices since it does not need fans or heat sinks, due to its extremely low power consumption and low heat capability when running AI,” said
Key Features of the RZ/V2MA
- Two 64-bit Arm Cortex-A53 cores with a maximum operating frequency of 1 GHz
- AI accelerator DRP-AI (1 TOPS/W class), achieving 52 fps (frames per second) when executing TinyYoloV3 programs
- OpenCV accelerator for rule-based image processing
- Ethernet, USB, and PCI Express interfaces for image input from external cameras
- Video codecs (H.265 and H.264)
- DRP-AI TVM tool for converting AI models based on TVM technology. Support ONNX and PyTorch formats initially.
- High-speed memory interfaces include LPDDR4 (3200Mbps), USB 3.1 (up to 5Gbps), and PCI Express (2 lanes)
- Available in 15mm square BGA package
Vision AI Gateway Solution with RZ/V2MA
Renesas has developed the "Vision AI Gateway Solution," which is an AI-based object detection and recognition platform that uses multiple cameras to collect and efficiently transmit data wirelessly. This high-speed processing solution combines the RZ/V2MA MPU with complimentary Renesas products such as power ICs, VersaClock clock generator, and communication modules for Wi-Fi, Bluetooth, and LTE. This solution not only provides flexible connectivity options but has an optimized power supply system and has been tested to accelerate development of robust AI gateway devices. This solution is part of Renesas’ Winning Combinations, which optimally combine mutually compatible Renesas devices that work together seamlessly to reduce user design risk and shorten time to market. Renesas offers more than 300 other Winning Combinations with a wide range of products from its portfolio. More information is available at: https://www.renesas.com/win.
Availability
The RZ/V2MA and development tools are available now. More information can be found here: https://www.renesas.com/rzv2ma
A video of an AI edge gateway demo is also available on amnimo’s website: https://youtu.be/OUpY2w0VdNk
This product is designed to use less power and contributes to energy savings within the system.
About
(Note 1) DRP-AI TVM is powered by EdgeCortix MERA™ Compiler Framework
(Note 2) For more information on Apache TVM, please refer to https://tvm.apache.org
(Remarks) EdgeCortix and MERA are trademarks or registered trademarks of
View source version on businesswire.com: https://www.businesswire.com/news/home/20220929005253/en/
+ 1-408-887-9006
akiko.ishiyama.xf@renesas.com
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