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QuickLogic to Present and Exhibit at Andes RISC-V CON Technology Summit in San Jose

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QuickLogic (NASDAQ: QUIK), a developer of embedded FPGA technology and solutions, is set to present at the Andes RISC-V CON Technology Summit in San Jose on April 29th, 2025. Andy Jaros, VP of IP Sales, will deliver a presentation titled 'RISC-V + eFPGA: A Flexible Solution for Any Application' at 12:10 p.m. PT at the DoubleTree by Hilton San Jose.

The presentation will explore how embedded FPGA (eFPGA) technology can enhance embedded RISC-V processing solutions from Andes Technology, focusing on:

  • Acceleration capabilities
  • Co-processing functions
  • Peripheral integration

Jaros will also showcase QuickLogic's Australis™ eFPGA IP Generator, demonstrating the company's ability to rapidly create custom eFPGA Hard IP cores across various process technologies and nodes. QuickLogic will maintain an exhibition presence at the event for additional engagement with attendees.

QuickLogic (NASDAQ: QUIK), sviluppatore di tecnologia e soluzioni FPGA integrate, parteciperà al Andes RISC-V CON Technology Summit a San Jose il 29 aprile 2025. Andy Jaros, VP delle vendite IP, terrà una presentazione intitolata 'RISC-V + eFPGA: Una soluzione flessibile per ogni applicazione' alle 12:10 PT presso il DoubleTree by Hilton San Jose.

La presentazione analizzerà come la tecnologia FPGA integrata (eFPGA) possa migliorare le soluzioni di elaborazione embedded RISC-V di Andes Technology, concentrandosi su:

  • capacità di accelerazione
  • funzioni di co-processing
  • integrazione periferica

Jaros presenterà inoltre il Generatore di IP eFPGA Australis™ di QuickLogic, dimostrando la capacità dell’azienda di creare rapidamente core IP Hard eFPGA personalizzati su diverse tecnologie e nodi di processo. QuickLogic sarà presente anche con uno stand espositivo per ulteriori interazioni con i partecipanti.

QuickLogic (NASDAQ: QUIK), desarrollador de tecnología y soluciones FPGA integradas, presentará en el Andes RISC-V CON Technology Summit en San José el 29 de abril de 2025. Andy Jaros, vicepresidente de ventas de IP, ofrecerá una presentación titulada 'RISC-V + eFPGA: Una solución flexible para cualquier aplicación' a las 12:10 p.m. PT en el DoubleTree by Hilton San José.

La presentación explorará cómo la tecnología FPGA integrada (eFPGA) puede mejorar las soluciones de procesamiento embebido RISC-V de Andes Technology, enfocándose en:

  • capacidades de aceleración
  • funciones de coprocesamiento
  • integración periférica

Jaros también mostrará el Generador de IP eFPGA Australis™ de QuickLogic, demostrando la capacidad de la compañía para crear rápidamente núcleos IP Hard eFPGA personalizados en diversas tecnologías y nodos de proceso. QuickLogic mantendrá una presencia en la exhibición para interactuar con los asistentes.

QuickLogic (NASDAQ: QUIK)은 임베디드 FPGA 기술 및 솔루션 개발업체로서 2025년 4월 29일 산호세에서 열리는 Andes RISC-V CON Technology Summit에서 발표를 진행할 예정입니다. IP 영업 부사장인 Andy Jaros가 더블트리 바이 힐튼 산호세에서 오후 12시 10분(태평양 시간)에 'RISC-V + eFPGA: 모든 애플리케이션에 유연한 솔루션'이라는 제목의 발표를 합니다.

이번 발표에서는 임베디드 FPGA(eFPGA) 기술이 Andes Technology의 임베디드 RISC-V 프로세싱 솔루션을 어떻게 향상시킬 수 있는지 다음과 같은 측면에서 다룹니다:

  • 가속화 기능
  • 코프로세싱 기능
  • 주변장치 통합

Jaros는 QuickLogic의 Australis™ eFPGA IP 생성기도 소개하며, 다양한 공정 기술과 노드에서 맞춤형 eFPGA 하드 IP 코어를 신속하게 생성하는 회사의 역량을 시연할 예정입니다. QuickLogic는 행사에서 추가적인 참석자와의 교류를 위해 전시 부스도 운영합니다.

QuickLogic (NASDAQ : QUIK), développeur de technologies et solutions FPGA intégrées, présentera au Andes RISC-V CON Technology Summit à San Jose le 29 avril 2025. Andy Jaros, vice-président des ventes IP, donnera une présentation intitulée « RISC-V + eFPGA : une solution flexible pour toute application » à 12h10 PT au DoubleTree by Hilton San Jose.

Cette présentation expliquera comment la technologie FPGA intégrée (eFPGA) peut améliorer les solutions de traitement embarqué RISC-V d’Andes Technology, en se concentrant sur :

  • les capacités d’accélération
  • les fonctions de coprocesseur
  • l’intégration des périphériques

Jaros présentera également le générateur d’IP eFPGA Australis™ de QuickLogic, démontrant la capacité de l’entreprise à créer rapidement des cœurs IP Hard eFPGA personnalisés sur diverses technologies et nœuds de processus. QuickLogic disposera également d’un stand d’exposition pour interagir davantage avec les participants.

QuickLogic (NASDAQ: QUIK), ein Entwickler von Embedded-FPGA-Technologie und -Lösungen, wird am Andes RISC-V CON Technology Summit am 29. April 2025 in San Jose teilnehmen. Andy Jaros, VP IP-Vertrieb, hält um 12:10 Uhr PT im DoubleTree by Hilton San Jose einen Vortrag mit dem Titel 'RISC-V + eFPGA: Eine flexible Lösung für jede Anwendung'.

Die Präsentation wird zeigen, wie die Embedded-FPGA (eFPGA)-Technologie die Embedded RISC-V-Verarbeitungslösungen von Andes Technology verbessern kann, mit Fokus auf:

  • Beschleunigungsfunktionen
  • Co-Processing-Fähigkeiten
  • Peripherieintegration

Jaros wird außerdem den Australis™ eFPGA IP Generator von QuickLogic vorstellen und die Fähigkeit des Unternehmens demonstrieren, schnell kundenspezifische eFPGA Hard-IP-Cores für verschiedene Fertigungstechnologien und Nodes zu erstellen. QuickLogic wird zudem mit einem Messestand vertreten sein, um den Austausch mit den Teilnehmern zu fördern.

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SAN JOSE, Calif., April 23, 2025 /PRNewswire/ -- QuickLogic Corporation (NASDAQ: QUIK), a developer of embedded FPGA (eFPGA) Hard IP, ruggedized FPGAs, and FPGA User Tools, will present and exhibit at the Andes RISC-V CON Technology Summit in San Jose on April 29th. The presentation, delivered by QuickLogic's Vice President of IP Sales, Andy Jaros, will focus on using embedded FPGA (eFPGA) technology to customize embedded RISC-V processing solutions from Andes Technology.

Title:

RISC-V + eFPGA: A Flexible Solution for Any Application

Date:

April 29, 2025

Time:

12:10 p.m. PT

Venue:

DoubleTree by Hilton San Jose

Mr. Jaros will discuss multiple use cases for augmenting processor-based designs with complementary eFPGA capabilities, including acceleration, co-processing, and peripheral integration. For each case, he will explain the inherent flexibility benefits in eFPGA technology and how these attributes can significantly add value to ASIC-based embedded processor designs.

He will also discuss QuickLogic's Australis™ eFPGA IP Generator, highlighting how QuickLogic rapidly creates custom eFPGA Hard IP cores tailored to each customer's unique requirements, across a wide range of process technologies and nodes.

In addition to the presentation, QuickLogic will be exhibiting at the event to engage with attendees and share more about its eFPGA solutions. For more information, please visit the event website.

About QuickLogic 
QuickLogic Corporation is a fabless semiconductor company that specializes in eFPGA Hard IP, discrete FPGAs, and endpoint AI solutions. The company's unique technology, combined with open-source development tools, enables highly customizable and low-power silicon solutions for aerospace and defense, industrial, consumer, and edge computing markets. For more information, visit www.quicklogic.com.

About Andes Technology
As a Founding Premier member of RISC-V International and a leader in commercial CPU IP, Andes Technology (TWSE: 6533SIN: US03420C2089ISIN: US03420C1099) is driving the global adoption of RISC-V. Andes' extensive RISC-V Processor IP portfolio spans from ultra-efficient 32-bit CPUs to high-performance 64-bit Out-of-Order multiprocessor coherent clusters. With advanced vector processing, DSP capabilities, the powerful Andes Automated Custom Extension (ACE) framework, end-to-end AI hardware/software stack, ISO 26262 certification with full compliance, and a robust software ecosystem, Andes unlocks the full potential of RISC-V, empowering customers to accelerate innovation across AI, automotive, communications, consumer electronics, data centers, and mobile devices. Over 16 billion Andes-powered SoCs are driving innovations globally. Discover more at www.andestech.com and connect with Andes on LinkedInX (formerly Twitter)Bilibili and YouTube.

QuickLogic and logo are registered trademarks of QuickLogic. All other trademarks are the property of their respective holders and should be treated as such.  

 

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SOURCE QuickLogic Corporation

FAQ

What will QuickLogic present at the Andes RISC-V CON Technology Summit 2025?

QuickLogic will present on using eFPGA technology to customize RISC-V processing solutions, focusing on acceleration, co-processing, and peripheral integration capabilities.

When and where is QuickLogic's RISC-V presentation scheduled for 2025?

The presentation is scheduled for April 29th, 2025, at 12:10 p.m. PT at the DoubleTree by Hilton San Jose.

What is QuickLogic's Australis eFPGA IP Generator?

Australis is QuickLogic's eFPGA IP Generator that creates custom eFPGA Hard IP cores tailored to customer requirements across various process technologies and nodes.

How does QuickLogic's eFPGA technology enhance RISC-V processing solutions?

QuickLogic's eFPGA technology enhances RISC-V solutions through acceleration, co-processing capabilities, and peripheral integration, adding flexibility to ASIC-based embedded processor designs.

What are the key applications of QuickLogic's eFPGA technology for RISC-V processors?

The key applications include acceleration, co-processing functions, and peripheral integration for ASIC-based embedded processor designs.
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