Lattice Extends Low Power FPGA Portfolio with Launch of MachXO5T-NX Advanced System Control FPGAs
Lattice Semiconductor (NASDAQ: LSCC) has announced the launch of the MachXO5T-NX family of control FPGAs, which aims to tackle increasing design complexities in system management. Designed for Communications, Computing, and Industrial applications, these FPGAs are built on the Lattice Nexus platform and feature hardened PCIe Gen 2 interfaces, significantly enhanced logic, memory resources, and improved security. Key highlights include up to 3.4X more embedded memory (7.2 Mb) and 100X more dedicated user flash memory (57 Mb) than competing products, along with a lower soft error rate. The MachXO5T-NX FPGAs are currently available for sampling, supported by the latest Lattice Radiant design software.
- Launch of MachXO5T-NX FPGAs enhances Lattice's market position.
- Features hardened PCIe Gen 2 interfaces for advanced connectivity.
- Increased embedded memory and user flash memory improve performance.
- Lower soft error rate enhances system reliability.
- None.
— Expands control FPGA leadership into next-gen control functions for Communications, Computing, and Industrial applications with hardened PCIe interfaces —
“As the pace of technological innovation accelerates and system management designs become more complex, the need for advanced processing capabilities increases,” said
Key features and performance highlights of the new low power Lattice MachXO5T-NX FPGAs include:
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Control FPGAs with PCIe
- Featuring hardened PCIe Gen 2 interfaces between the host processor and the control FPGA.
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Increased logic and memory resources
- Up to 3.4X more embedded memory (7.2 Mb) than competing FPGAs of a similar class, minimizing the need for external memory.
- Up to 100X more dedicated user flash memory (57 Mb) than competing FPGAs of a similar class to store mission-critical data and parameters.
- Up to 100X lower soft error rate than competing FPGAs of a similar class, improving system reliability for safety-critical applications.
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Robust programmable I/O
- Address challenges of modern CPUs and SoCs lacking the robust 3.3 V I/O signaling support required to communicate with many other devices in system.
- Feature up to 291 general purpose I/O that support early I/O configuration and provide added features such as 1.25 Gbps SGMII, default pull-down, hot socketing, and programmable slew rate for simplified board design.
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Class-leading security
- On-chip multi-boot with bitstream encryption (AES256) and authentication (ECC256).
- Run-time security capabilities not currently available in competitive FPGAs of a similar class.
MachXO5T-NX FPGAs are sampling today and are supported by the latest release of Lattice Radiant® design software.
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