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GBT Files Patent For ICs Layout Automatic Correction of Geometrical Design Rules System

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GBT Technologies Inc. (GTCH) has filed a provisional patent for an Integrated Circuits automatic design rule correction system, aiming to enhance productivity in microchip layout design, especially for 7nm and below processes. The technology is expected to significantly reduce design cycle times, improve silicon yield, and lower costs for fabless IC design firms. However, implementation success relies on patent approval and securing capital. CEO Dany Rittman emphasizes the potential impact on the industry, though no guarantees of success are provided.

Positive
  • Provisional patent filed for automatic correction of IC layout design rules, potentially enhancing productivity.
  • Significant reduction in layout design cycle times anticipated, particularly for advanced nanometer ranges.
  • Expected improvements in silicon yield and reduced manufacturing costs for fabless IC design firms.
Negative
  • Success of the system relies on USPTO patent approval and adequate capital raising.
  • No guarantees of successful implementation or market acceptance provided.

The technology aims for significant reduction of microchip’s layout design cycle; particularly, in advanced nanometer ranges, 7nm and below, enabling faster chip’s design and manufacturing cycle

SAN DIEGO, June 22, 2021 (GLOBE NEWSWIRE) -- GBT Technologies Inc. (OTC PINK: GTCH ) ("GBT” or the “Company”), filed a provisional patent application for Integrated Circuits automatic design rule correction system and method; the application number 63197635 with the U.S. Patent and Trademark Office (“USPTO”). The patent protects IP for automatic correction of manufacturing process geometrical design rules violations in microchips layout data (Professional term; DRC).

Typically, a mask layout database is created manually by a layout designer or automatically by a synthesis tool. Once the mask layout database is complete, it must go through a series of verifications in few domains. One of these checks is geometrical, to check featured dimensions according to the manufacturing process rules. Today, most of the design rule violations in the mask layout database are corrected manually by a layout designer, mainly with Analog and MIXED layout types. The designer finds each violation and manually corrects the violations by moving/modifying polygons associated with the violations. During the correction process, the layout designer may create new design rule violations and therefore the correction process may be repeated until the mask layout database does not include any design rule violations. The process of iteratively correcting the design rule violations may take several hours or even days to complete and typically significantly increase the overall layout design time. The additional time required to complete layout may also delay the production of a photomask set used to fabricate the integrated circuit.

The invention includes a method and system for automatic correction of an IC layout design rule violations to match the process rule deck reference. The automatic correction, once implemented maintains the integrated circuit mask layout electrical connectivity (LVS), reliability (RV) and Design for Manufacturing (DFM) correctness. The number of design rules has been dramatically increased over the years especially in advanced nanometer process of 7nm and below. In addition, geometrical design rules became more convoluted and highly complex to comply which requires vast amount of manual correction. Using the invention once fully developed, GBT predicts a significant IC layout productivity enhancement, enabling higher silicon yield and faster microchip’s time to market. Fabless IC design firms will be able to design and manufacture their chips faster and with lower cost.

“This type of system is a significant productivity enhancer tool within IC’s design flow and will majorly reduce the global layout design time and chip’s overall time to market factor. In addition, microchips will be able to be made smaller, which increase the silicon yield enabling much higher profit margin. Project’s design time will shrink and fabless IC design firms will be able to design more advanced chips in less time. We strongly believe that this technology will make a major impact in this arena and now working on a nonprovisional application as also on future development of such commercial EDA tool”… Said Dany Rittman, the Company’s CTO.

There is no guarantee that the Company will be successful in implementing this system. In order to successfully implement this system – other than getting the patent approved by the USPTO, the Company will need to raise adequate capital to support its efforts; and, if successfully, obtained developed and granted actual specific approval, the Company would need to enter into a strategic relationship with a third party that has experience in manufacturing, selling and distributing this product. There is no guarantee that the Company will be successful in any or all of these critical steps.

About Us

GBT Technologies, Inc. (OTC PINK: GTCH) (“GBT”) (http://gbtti.com) is a development stage company which considers itself a native of Internet of Things (IoT), Artificial Intelligence (AI) and Enabled Mobile Technology Platforms used to increase IC performance. GBT has assembled a team with extensive technology expertise and is building an intellectual property portfolio consisting of many patents. GBT’s mission, to license the technology and IP to synergetic partners in the areas of hardware and software. Once commercialized, it is GBT’s goal to have a suite of products including smart microchips, AI, encryption, Blockchain, IC design, mobile security applications, database management protocols, with tracking and supporting cloud software (without the need for GPS). GBT envisions this system as a creation of a global mesh network using advanced nodes and super performing new generation IC technology. The core of the system will be its advanced microchip technology; technology that can be installed in any mobile or fixed device worldwide. GBT’s vision is to produce this system as a low cost, secure, private-mesh-network between all enabled devices. Thus, providing shared processing, advanced mobile database management and sharing while using these enhanced mobile features as an alternative to traditional carrier services.

Forward-Looking Statements

Certain statements contained in this press release may constitute "forward-looking statements". Forward-looking statements provide current expectations of future events based on certain assumptions and include any statement that does not directly relate to any historical or current fact. Actual results may differ materially from those indicated by such forward-looking statements because of various important factors as disclosed in our filings with the Securities and Exchange Commission located at their website ( http://www.sec.gov). In addition to these factors, actual future performance, outcomes, and results may differ materially because of more general factors including (without limitation) general industry and market conditions and growth rates, economic conditions, governmental and public policy changes, the Company’s ability to raise capital on acceptable terms, if at all, the Company’s successful development of its products and the integration into its existing products and the commercial acceptance of the Company’s products. The forward-looking statements included in this press release represent the Company's views as of the date of this press release and these views could change. However, while the Company may elect to update these forward-looking statements at some point in the future, the Company specifically disclaims any obligation to do so. These forward-looking statements should not be relied upon as representing the Company's views as of any date subsequent to the date of the press release.

Contact:

Dr. Danny Rittman, CTO
press@gopherprotocol.com


FAQ

What patent application did GTCH file?

GTCH filed a provisional patent application for an Integrated Circuits automatic design rule correction system.

How does the new technology benefit microchip design?

The technology aims to significantly reduce design cycle times and improve silicon yield for microchips.

What challenges does GTCH face in implementing the new system?

GTCH needs to secure patent approval and raise adequate capital to successfully implement the system.

What is the focus of GTCH's new patent application?

The focus is on automatic correction of manufacturing process geometrical design rules violations in microchip layout.

When was the patent application filed by GTCH?

The patent application was filed on June 22, 2021.

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