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Cadence Design Systems Inc (CDNS) provides critical electronic design automation (EDA) software and semiconductor intellectual property solutions powering modern chip development. This news hub offers investors and industry professionals centralized access to official announcements and market-relevant updates.
Track earnings reports, product launches, and strategic partnerships shaping the EDA landscape. Our curated collection ensures timely access to developments impacting semiconductor design innovation across automotive, AI hardware, and IoT sectors.
Discover how Cadence's tools in digital verification, custom IP blocks, and system-level integration address evolving industry challenges. Bookmark this page for streamlined monitoring of operational milestones and technology advancements directly from the source.
Cadence Design Systems (CDNS) has partnered with Google Cloud to enhance semiconductor design through the Cadence Cloud Passport, offering certified cloud-ready tools. This collaboration has resulted in up to 10X improvements in design throughput and 25% performance gains on Google Cloud C2D instances versus on-premises solutions. Customers benefit from improved scalability, high-performance computing access, and reduced time-to-solution. Notably, Google silicon teams have successfully utilized Cadence tools to develop Tensor SoCs and TPUs, significantly boosting design reliability and project timelines.
Cadence Design Systems introduces the Cadence Certus Closure Solution, designed to automate the chip design closure process, reducing turnaround time from weeks to overnight. This solution features a massively parallel architecture, significantly boosting productivity by up to 10X compared to existing methodologies. The Certus Closure Solution supports essential design aspects such as 5G communications and hyperscale computing, while offering cloud readiness for extensive chip design projects. It enhances engineering productivity and integrates with existing tools for streamlined operations.
Cadence Design Systems (CDNS) will host its third quarter 2022 financial results webcast on October 24, 2022, at 2:00 p.m. Pacific Time. CEO Dr. Anirudh Devgan and CFO John Wall will participate in the event. An archived version of the webcast will be accessible from 5:00 p.m. Pacific Time on the same day until December 16, 2022. Cadence is recognized as a leader in electronic systems design, known for its Intelligent System Design strategy and has been named one of the 100 Best Companies to Work For by Fortune for eight consecutive years.
Cadence Design Systems (CDNS) has announced the certification of an 8nm RFIC design reference flow by Samsung Foundry, aimed at developing 5G RFICs for sub-6GHz to mmWave applications. This advanced design flow enhances productivity, electrical analysis, and design closure, enabling high-quality RFIC designs on the first pass. Key features of the flow include support for circuit simulation, electromagnetic-aware design, and post-layout extraction. This collaboration advances the design capabilities for customers in the growing 5G market, including smartphones and communications infrastructure.
Cadence Design Systems (NASDAQ: CDNS) has optimized its Voltus-XFi Custom Power Integrity solution for Samsung Foundry’s advanced 5LPE process technology. This certification enhances collaboration between the two companies, allowing customers to integrate advanced design software for creating integrated circuits (ICs) aimed at hyperscale computing, mobile, automotive, and AI applications. The Voltus-XFi solution offers a comprehensive workflow, ensuring high performance and low power consumption in line with emerging technology demands.
Cadence Design Systems has launched the Cadence Verisium Artificial Intelligence (AI)-Driven Verification Platform. This new suite uses big data and AI to enhance verification workloads, coverage, and the analysis of design bugs on complex System-on-Chips (SoCs). Built on the Cadence Joint Enterprise Data and AI (JedAI) Platform, Verisium optimizes multiple runs across SoC designs, improving productivity through advanced machine learning models. Initial apps include Verisium AutoTriage, SemanticDiff, and others, each focused on automating and streamlining the verification process.
Cadence Design Systems has launched the Cadence JedAI Platform, a significant advancement in electronic design automation (EDA) that integrates big data and AI to enhance productivity and optimize the design process. This platform unifies analytics across various Cadence applications, enabling engineers to manage both structured and unstructured data efficiently. It aims to facilitate quicker insights and improve key metrics such as power, performance, and area (PPA) across multiple designs. The platform supports cloud capabilities and is designed to meet the growing complexities in chip design across diverse industries.
Cadence Design Systems (NASDAQ: CDNS) has acquired OpenEye Scientific Software for approximately
United Microelectronics Corporation (UMC) and Cadence Design Systems (CDNS) announced the certification of Cadence's analog/mixed-signal IC design flow for UMC's 22ULP/ULL process technologies. This collaboration enhances process efficiency and shortens design cycles for applications in 5G, IoT, and displays. UMC's 22nm technology focuses on ultra-low power and leakage, providing customers with a balance of cost and performance. The certified flow includes tools like the Virtuoso design platform and Spectre AMS Designer, aimed at boosting design efficiency.
