New Cadence Joint Enterprise Data and AI Platform Dramatically Accelerates AI-Driven Chip Design Development
Cadence Design Systems has launched the Cadence JedAI Platform, a significant advancement in electronic design automation (EDA) that integrates big data and AI to enhance productivity and optimize the design process. This platform unifies analytics across various Cadence applications, enabling engineers to manage both structured and unstructured data efficiently. It aims to facilitate quicker insights and improve key metrics such as power, performance, and area (PPA) across multiple designs. The platform supports cloud capabilities and is designed to meet the growing complexities in chip design across diverse industries.
- Launch of Cadence JedAI Platform enhances productivity and design optimization across EDA tools.
- Integration of big data and AI enables actionable insights for chip design and verification.
- Cloud-enabled platform offers scalable resources, improving overall efficiency.
- Unifies analytics across various Cadence applications and third-party systems.
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Highlights:
- The new Cadence platform is a critical big data analytics infrastructure that unifies massive data sets across all Cadence computational software
- Enables a new generation of Cadence AI-driven design and verification applications that dramatically improve productivity and PPA
The new Cadence(R) Joint Enterprise Data and AI (JedAI) Platform is enabling a generational shift from single-run, single-engine algorithms in EDA to algorithms that leverage big data and AI to optimize multiple runs of multiple engines across an entire SoC design and verification flow. (Photo: Business Wire)
With the new Cadence JedAI Platform, engineers can seamlessly manage both structured and unstructured data, including:
- Design data such as waveforms and coverage in functional verification, physical layout shapes, timing/power/voltage/variation analysis reports, design RTL, netlist and SDC specifications in design implementation
- Workload data such as runtime, memory usage and disk space usage, as well as metadata about the inputs to each job and dependencies between them
- Workflow data such as the tools and methodology used to create a design
The Cadence JedAI Platform makes it easier to manage design complexities associated with emerging consumer, hyperscale computing, 5G communications, automotive and mobile applications, and more. Customers using Cadence analog/digital/PCB implementation, verification, and analysis software—and even third-party applications—can use the Cadence JedAI Platform to unify and analyze all their big data analytics. Furthermore, the new platform is cloud-enabled, offering highly scalable compute resources in a secure design environment from top cloud providers.
“To enable the semiconductor industry to continue on its strong growth trajectory, it’s critical that the chip design process becomes much more efficient to keep pace with market demands,” said
Customers using the Cadence JedAI Platform have access to the following benefits:
- Highly scalable: Enterprise-grade scalability and security, enabling design optimization across multiple runs, tools, users, designs, and EDA domains
- Actionable intelligence: Quickly compares metrics across different versions of the same design and/or multiple designs, providing recommended actions to improve PPA and increase verification coverage
- Workflow management technology: Integrated workflow management capability allows users to efficiently capture chip design methodologies and automatically transfer design data between projects through data connectors
- Customized analytics: Offers open industry-standard user interfaces such as Python, Jupyter Notebook and REST APIs, enabling designers to create custom analytics applications
“Meeting design targets requires a variety of analytics and significant design resources,” said
“As chip design size and complexity has increased exponentially over the past decade, the volume of design and verification data has also increased with it,” said Dr. Venkat Thanvantri, VP of AI R&D at Cadence. “Previously, we saw that once a chip design project was completed, the valuable data was deleted to make way for the next project. There are valuable learnings in the legacy data, and the Cadence JedAI Platform makes it easy for engineering teams to access these learnings and apply them to future designs to deliver optimal engineering productivity and PPA and ultimately more predictable, higher quality product outcomes.”
The Cadence JedAI Platform supports the company’s Intelligent System Design™ strategy, which enables pervasive intelligence for design excellence. For more information, please visit www.cadence.com/go/jedaipr.
About Cadence
Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For eight years in a row,
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Category: Featured
View source version on businesswire.com: https://www.businesswire.com/news/home/20220913005383/en/
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