GUC Delivers its First TSMC N3 Chip and First AI-Optimized N5 Design Using Cadence Digital Solutions

Rhea-AI Summary

Cadence Design Systems (CDNS) announced that Global Unichip Corp. (GUC) has successfully delivered advanced high-performance computing (HPC) and CPU designs leveraging Cadence's digital solutions. Key highlights include a 3.16GHz HPC core design with a 3.5 million instance count on TSMC’s N3 process, and an 8% reduction in power and 9% area shrink in a CPU design on the N5 process using AI-enabled Cadence Cerebrus. These innovations enhance engineering productivity and demonstrate GUC's commitment to advanced chip solutions for emerging markets like AI and 5G.

Positive

• Successful delivery of advanced HPC design featuring 3.16GHz performance and 3.5M instances.
• 9% area shrink and 8% power reduction in CPU design using Cadence Cerebrus.

Negative

• None.

Highlights:

• Using Innovus Implementation, GUC delivered a 3.16GHz HPC core design with 3.5M instances on the TSMC N3 process technology
• GUC realized a 9% area shrink and an 8% reduction in power consumption on a CPU design on the TSMC N5 process using the AI-enabled Cadence Cerebrus

SAN JOSE, Calif.--(BUSINESS WIRE)-- Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Global Unichip Corp. (GUC) successfully delivered an advanced HPC design and a CPU design using Cadence^® digital solutions. The HPC design was created using the Cadence Innovus^™ Implementation System on TSMC’s advanced N3 process and featured a 3.5 million instance count that reached clock speeds of up to 3.16GHz. The CPU design was created using the AI-enabled Cadence Cerebrus^™ Intelligent Chip Explorer and the digital full flow on the TSMC N5 process technology, delivering 8% reduced power and a 9% area improvement while significantly improving engineering productivity.

The Innovus Implementation System’s highly accurate GigaPlace engine provided GUC with support for TSMC FinFlex™ cell row placement and consideration for pin access throughout the flow for N3 design rule checking (DRC) closure. The state-of-the-art GigaOpt engine delivered improved optimization by enabling the most optimal configuration from the TSMC N3 library while balancing different cell row utilization. The Innovus Implementation System also includes a massively parallel architecture and incorporates the well-established NanoRoute engine, which enabled GUC to address signal integrity early in the design flow while improving post-route correlation.

Cadence Cerebrus, coupled with the Cadence digital flow, was instrumental in providing GUC with power, performance and area (PPA) benefits as well as the ability to perform synthesis through implementation and signoff on their 5nm CPU design, optimizing engineering team productivity. Unique to Cadence Cerebrus is its reinforcement learning engine that autonomously optimized GUC’s design flow, allowing the team to exceed human engineering potential and accelerate time to market.

“GUC is a market leader providing advanced chip solutions for AI, HPC, 5G, industrial and other emerging applications,” said Dr. Louis Lin, senior vice president of Design Services at GUC. “Given our commitment to deliver the most competitive designs to our customers, it is important for us to invest in leading-edge technologies. The Cadence Cerebrus Intelligent Chip Explorer, in conjunction with the broader digital flow, was the natural choice to help us achieve faster design turnaround via AI technology while also improving PPA. The Innovus Implementation System was instrumental in helping us deliver our first N3 chip, enabling our team to accelerate the creation of our high-performance, low-power HPC design.”

Cadence Cerebrus and Innovus Implementation are part of the broader digital flow and support the company’s Intelligent System Design^™ strategy, which enables SoC design excellence. For more information, please visit www.cadence.com/go/innovuscerebruscspr.

About Cadence

Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For eight years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.

© 2023 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

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Source: Cadence Design Systems, Inc.

FAQ

What is the significance of the HPC core design delivered by GUC using Cadence solutions?

The HPC core design achieved a clock speed of 3.16GHz with 3.5 million instances, showcasing advanced capabilities in chip design.

How did GUC improve its CPU design efficiency using Cadence Cerebrus?

GUC realized an 8% power reduction and 9% area shrink, optimizing engineering productivity through AI technology.

What process technology was used for the HPC and CPU designs mentioned in the Cadence press release?

The HPC design was developed on TSMC’s N3 process technology, while the CPU design utilized the N5 process.

What impact does Cadence Cerebrus have on GUC's chip design process?

Cadence Cerebrus provides power, performance, and area benefits while accelerating time to market through AI-driven optimizations.