Cadence’s New Flow Automates Custom/Analog Design Migration on TSMC Advanced Technologies
Cadence Design Systems (CDNS) has partnered with TSMC to create a streamlined node-to-node migration process for analog IC blocks using TSMC's advanced technology. The collaboration allows for automated design migration, significantly improving efficiency with early customers reporting a design cycle reduction of over 2.5X. The Cadence Virtuoso design platform is central to this process, facilitating automatic schematic and layout migration while ensuring thorough optimization through simulation. This advancement supports Cadence's strategic goal of enhancing design automation and productivity.
- Collaborative development with TSMC enhances design migration efficiency.
- Early adopters achieved over 2.5X reduction in design cycle time.
- Automated migration solutions improve productivity in analog design processes.
- None.
Highlights:
- Companies to enable easy node-to-node migration for analog blocks with enhanced PDK across multiple FinFET processes to accelerate design closure
- Early customers seeing more than 2.5X design cycle reduction on common analog blocks
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Cadence Virtuoso design platform is optimized for design migration and automation of TSMC FinFET technologies
The Virtuoso Application Library Environment schematic migration solution, which is integrated into the Virtuoso design platform, automatically migrates a source schematic’s cells, parameters, pins and wiring from one process node to another technology. The target schematic is then tuned and optimized using the Virtuoso ADE Product Suite’s simulation environment and circuit optimization technology to verify the new schematic meets all necessary measurement targets.
The Virtuoso Layout Suite supports the reuse of existing layouts on a given process technology to quickly recreate a migrated layout on a new process technology, using custom place and route automation. Thanks to Virtuoso Layout Suite templates, TSMC’s analog-mapping technology and the routing technology in the Virtuoso design platform, designers can automatically recognize and extract groups of devices in an existing layout and apply templates to similar groups in the new layout.
“Through our continued collaboration with Cadence, we’re enabling our customers to improve productivity and accelerate design closure when performing node-to-node design migration of analog blocks within the Virtuoso design platform,” said Dan Kochpatcharin, Head of
“By working closely with TSMC, our customers now have access to the most sophisticated migration and custom/analog place and route automation capabilities within the Virtuoso design platform,” said
The Cadence Virtuoso design platform supports the Cadence Intelligent System Design™ strategy, enabling system-on-chip (SoC) design excellence. For more information on the Virtuoso design platform, please visit http://www.cadence.com/go/virtuosomigrationpr.
About Cadence
Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For eight years in a row,
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