Cadence Demonstrates Interoperability with SK hynix’s Highest Speed LPDDR5T Mobile DRAM at 9600Mbps

Rhea-AI Summary

Cadence Design Systems, Inc. (CDNS) has announced successful interoperability of its LPDDR5X memory interface IP with SK hynix’s LPDDR5T mobile DRAM, achieving speeds above the LPDDR5X standard. The LPDDR5X IP design operates at 8533Mbps, while the LPDDR5T technology reaches 9600Mbps. This high-performance memory solution is designed with a scalable architecture and is positioned for future memory developments, enhancing its adaptability. The technology is now available for customer engagements, supporting Cadence’s Intelligent System Design strategy, which focuses on optimized SoC design. These advancements open new opportunities in sectors such as AI and augmented reality, marking a significant milestone for Cadence in the memory interface space.

Positive

• Demonstrated interoperability between Cadence's LPDDR5X IP and SK hynix's LPDDR5T DRAM, enhancing product offerings.
• Achieved memory speeds of 9600Mbps, exceeding LPDDR5X standards, expanding potential applications beyond smartphones.
• The LPDDR5X IP is now available for customer engagements, indicating strong market readiness.

Negative

• None.

Complete high-performance memory controller and PHY solution is future-proofed for future memory

SAN JOSE, Calif.--(BUSINESS WIRE)-- Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it has demonstrated interoperability between the silicon-proven Cadence^® LPDDR5X memory interface IP and SK hynix’s LPDDR5T (Turbo) mobile DRAM, operating at speeds in excess of the LPDDR5X standard. This milestone follows Cadence’s earlier announcement of the first LPDDR5X memory interface IP design operating at 8533Mbps and SK hynix’s first announcement of its LPDDR5T mobile DRAM technology operating at 9600Mbps.

Available now for customer engagements, the Cadence LPDDR5X IP boasts a new high-performance, scalable and adaptable architecture based on Cadence’s proven and highly successful LPDDR5 and GDDR6 product lines. The complete, high-performance memory controller and PHY solution is future proofed for future memory, and Cadence’s leading design techniques and flexibility enable the introduction of new memory devices into the system and achieve interoperability with excellent system margins.

“SK hynix’s LPDDR5 Turbo mobile DRAM opens up new possibilities beyond smartphones, to AI, machine learning and augmented/virtual reality,” said Sungsoo Ryu, VP of DRAM product planning at SK hynix. “Proving interoperability with Cadence’s memory interface IP is a key step in enabling customers targeting 9600Mbps operation.”

“Cadence LPDDR5X design IP implements the highest performance signal-boosting design techniques,” noted Sanjive Agarwala, corporate vice president and general manager of the IP Group at Cadence. “The result is that we can demonstrate wide-open data eyes with a large amount of system margin when operating with SK hynix’s 9600Mbps mobile DRAM.”

The LPDDR5X IP supports Cadence’s Intelligent System Design^™ strategy, which enables SoC design excellence with high-performance, design-optimized, best-in-class technology. For more information on the LPDDR5X IP, please visit www.cadence.com/go/lpddr5x.

About Cadence
Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For nine years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.

© 2023 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

Category: Featured

View source version on businesswire.com: https://www.businesswire.com/news/home/20230417005260/en/

For more information, please contact:

Cadence Newsroom

408-944-7039

newsroom@cadence.com

Source: Cadence Design Systems, Inc.

FAQ

What recent advancements has Cadence Design Systems made with its LPDDR5X memory interface IP?

Cadence announced interoperability between its LPDDR5X memory interface IP and SK hynix’s LPDDR5T mobile DRAM, achieving speeds above the LPDDR5X standard.

What is the significance of the LPDDR5X IP's operation at 9600Mbps?

The LPDDR5X IP's operation at 9600Mbps opens new possibilities for applications in AI, machine learning, and augmented reality.

When will the Cadence LPDDR5X IP be available to customers?

The Cadence LPDDR5X IP is currently available for customer engagements.

How does Cadence's LPDDR5X IP support future memory developments?

The LPDDR5X IP is designed with a scalable and adaptable architecture, ensuring compatibility with future memory technologies.

What strategy does Cadence's LPDDR5X IP support?

The LPDDR5X IP supports Cadence’s Intelligent System Design strategy, aimed at optimizing SoC design.