Cadence Announces Industry Best-In-Class 8533Mbps LPDDR5X IP Solution for Next-Generation AI, Automotive and Mobile Applications

Rhea-AI Summary

Cadence Design Systems has launched the first LPDDR5X memory interface IP design optimized for speeds of 8533Mbps, representing a 33% increase over previous generations. This technology is now available for customer engagements, featuring a silicon-proven PHY and high-performance controller aligned with the JEDEC JESD209-5B standard. It supports advanced applications in automotive, IoT, and networking. The architecture enhances power and performance adaptability, reinforcing Cadence's leadership in memory interface IP for future AI and automotive SoC designs.

Positive

• Launch of LPDDR5X IP supports 8533Mbps, 33% faster than prior versions.
• Silicon-proven PHY and controller ensure reliability and performance.
• Broad application scope: automotive, edge AI, and networking.
• Flexible architecture allows for customization based on application needs.
• Verification with Cadence’s Verification IP facilitates quick SoC verification.

Negative

• None.

Complete silicon-proven, high-performance solution available now for customer engagements

SAN JOSE, Calif.--(BUSINESS WIRE)-- Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the first LPDDR5X memory interface IP design optimized to operate at 8533Mbps—up to 33% faster than the previous generation of LPDDR IP. Available now for customer engagements, the Cadence^® LPDDR5X IP boasts a new high-performance, scalable and adaptable architecture based on Cadence’s proven and highly successful LPDDR5 and GDDR6 product lines. The new Cadence LPDDR5X memory IP solution consists of a silicon-proven PHY and high-performance controller designed to connect to LPDDR5X DRAM devices that follow the JEDEC JESD209-5B standard. The controller/PHY interface is based on the latest DFI 5.1 specification, and a variety of on-chip buses are supported.

LPDDR5X memory opens up a wide variety of high-bandwidth applications beyond the mobile market traditionally served by LPDDR memory, including advanced driver assistance systems (ADAS), autonomous driving, lower-end edge AI and networking. Cadence LPDDR5X IP is designed to enable the industry’s next-generation SoC designs for these and other applications with flexible floorplan design options, while the new architecture allows fine-tuning of power and performance based on individual application requirements.

Cadence design IP supports the fastest data rate defined by the JEDEC standard (JESD209-5B). Cadence’s LPDDR5X Controller and PHY have been verified with Cadence’s Verification IP (VIP) for LPDDR5X to provide rapid IP and SoC verification closure. Cadence VIP for LPDDR5X includes a complete solution from IP to system-level verification with DFI VIP, LPDDR5X memory model and System Performance Analyzer.

“LPDDR5X’s peak speeds will raise the bar for device experiences and performance at the edge, from automotive to consumer IoT to networking devices,” said Michael Basca, vice president of products and systems in Micron’s Embedded Business Unit. “Our collaboration with Cadence will accelerate ecosystem adoption of LPDDR5X by enabling the next wave of chipsets to work seamlessly with this low-power, high-performance memory.”

“Cadence LPDDR5X IP operating at 8533Mbps in silicon showcases Cadence’s next-generation architecture for complete memory system IP solutions,” noted Sanjive Agarwala, corporate vice president and general manager of the IP Group at Cadence. “This new leading-edge memory IP solution solidifies our memory interface IP leadership by enabling the industry’s future AI, automotive and mobile SoC designs today.”

The LPDDR5X IP supports Cadence’s Intelligent System Design^™ strategy, which enables SoC design excellence with high-performance, design-optimized, best-in-class technology. For more information on the LPDDR5X IP, please visit www.cadence.com/go/lpddr5x.

About Cadence

Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For eight years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.

© 2022 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. in the US and/or elsewhere. All other trademarks are the property of their respective owners.

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Source: Cadence Design Systems, Inc.

FAQ

What is the significance of Cadence's LPDDR5X memory IP design?

Cadence's LPDDR5X memory IP design enhances performance with speeds of 8533Mbps, 33% faster than previous technologies, enabling advanced applications in automotive and IoT sectors.

When was the Cadence LPDDR5X memory interface IP announced?

The Cadence LPDDR5X memory interface IP was announced on December 22, 2022.

What are the applications of Cadence's LPDDR5X memory IP?

The LPDDR5X memory IP targets high-bandwidth applications, including automotive driver assistance systems, edge AI, and networking devices.

Which standard does the Cadence LPDDR5X memory interface comply with?

The LPDDR5X memory interface complies with the JEDEC JESD209-5B standard.

How does Cadence's LPDDR5X IP support SoC design?

Cadence's LPDDR5X IP supports SoC design through its scalable architecture, allowing for power and performance adjustments tailored to specific application requirements.