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Synopsys Launches Industry's First Complete 1.6T Ethernet IP Solution to Meet High Bandwidth Needs of AI and Hyperscale Data Center Chips

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Synopsys introduces a groundbreaking 1.6T Ethernet IP solution that enhances bandwidth and throughput for AI workloads, reducing power consumption by up to 50%. The new controllers offer latency reduction and area reduction compared to existing solutions. The silicon-proven 224G Ethernet PHY IP is customizable for various connections, optimizing power and performance. Synopsys' verification IP accelerates verification closure, aiding in faster chip development for data-intensive applications.
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The introduction of Synopsys' 1.6T Ethernet IP solution is a significant technological advancement with potential ripple effects across the semiconductor industry and the broader technology sector. As data centers increasingly become the backbone of cloud computing, AI and machine learning, the demand for high-bandwidth, low-latency solutions is surging. Synopsys' new offering, which promises to reduce interconnect power consumption and latency while increasing bandwidth, could help hyperscale data center operators reduce operational costs and enhance performance.

From a market perspective, this development could strengthen Synopsys' competitive position against other semiconductor IP providers. The reported 50% power consumption reduction and 40% latency decrease are substantial improvements that could incentivize data center operators and chip designers to adopt this new IP solution, potentially increasing Synopsys' market share and impacting its financial performance positively.

The market for Ethernet IP solutions is directly tied to the growth of data-intensive industries such as cloud computing and AI. Synopsys' release of the 1.6T Ethernet IP solution could be a strategic move to capture market share in a sector with increasing demand. Financially, the adoption rate of this new technology by data center providers and the ecosystem that serves them will be a key metric to watch.

Investors should monitor the adoption trends of Synopsys' new Ethernet IP solution, as it could lead to increased revenue streams and potentially higher margins due to the reported efficiencies in power and area reduction. It's also worth noting that if Synopsys can secure a dominant position in the 1.6T Ethernet market, it could lead to long-term financial gains and stronger bargaining power with customers.

The technical specifics of Synopsys' 1.6T Ethernet IP solution, such as the patented Reed-Solomon Forward Error Correction architecture, are crucial for understanding the value proposition of the product. This architecture is known for its error-correcting capabilities, which are essential for maintaining data integrity over high-speed networks. The reported 50% area reduction indicates that Synopsys has achieved significant advancements in IP core density, which is a key factor in chip design for space-constrained applications.

The silicon-proven nature of the 224G PHY IP suggests that Synopsys has already tested and validated the performance of this component in real-world scenarios, which reduces the risk for adopters. The emphasis on interoperability and pre-verified subsystems highlights Synopsys' commitment to ensuring that their solutions can be integrated smoothly into existing technology stacks, which is a critical consideration for design teams.

Solution Helps Future-Proof Infrastructure Using New 1.6T Ethernet Controller IP, Silicon-Proven 224G PHY IP, and Verification IP

Highlights:

  • Available now and adopted by multiple customers, Synopsys' complete 1.6T Ethernet IP solution, reduces interconnect power consumption by up to 50% compared to existing implementations
  • New multi-channel/multi-rate Ethernet controllers offer 1.6T support with up to 40% latency reduction and up to 50% area reduction compared to existing multi-rate 800G IP solutions
  • Silicon-proven 224G Ethernet PHY IP is customizable to support chip-to-chip, chip-to-module, and copper cable connections optimizing power and performance tradeoffs
  • Synopsys verification IP for 1.6T Ethernet accelerates verification closure with a comprehensive set of protocol, methodology, and productivity features

SUNNYVALE, Calif., Feb. 29, 2024 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today delivered a dramatic increase in bandwidth and throughput for data-intensive AI workloads with the industry's first complete 1.6T Ethernet IP solution. Hyperscale data centers, a backbone in the era of pervasive intelligence, require high-bandwidth, low-latency chips and interfaces to process petabytes of data quickly. Synopsys' new 1.6T Ethernet IP solution enables design teams to create the industry's fastest chips for AI and data center networking applications.

Synopsys is enabling hyperscale data center providers, and the ecosystem that serves them, to future-proof their infrastructure via their silicon roadmap, using the industry's most extensive, interoperable, and proven IP portfolio:

"Massive artificial intelligence and machine learning workloads are accelerating the need for 1.6T Ethernet in data centers," said Ram Periakaruppan, vice president and general manager, Network Test & Security Solutions, Keysight Technologies. "The combination of Synopsys' new 1.6T Ethernet controllers and robust 224G Ethernet PHY IP and Keysight's IxVerify pre-silicon test solution are essential to helping customers design the world's fastest, most reliable system on a chip devices."

"Insatiable demand for high-speed data access is pushing hyperscale cloud providers to upgrade their networking infrastructure to maintain their competitive edge" said Keith Guetig, vice president of Product Management, Samtec. "With successful interoperability between this and many prior generations of Synopsys' high-quality Ethernet solutions and Samtec's high-speed FlyOver® cable assemblies, chip designers and system architects can reduce their design risk when developing the next generation of SoCs for cloud, AI, and 5G applications."

"With growing demands from large language modeling, HPC simulation, and AI training in hyperscale data centers, network boundaries are crossing over the Terabits per second threshold," said Peter Jones, chairman, Ethernet Alliance. "The availability of development tools capable of meeting these needs is critical to the success of next-generation Ethernet standards addressing this market."

"The massive compute demands of hyperscale data centers require significantly faster Ethernet speeds to enable emerging AI workloads," said John Koeter, senior vice president of marketing and strategy for IP, Synopsys. "Our complete IP solution for 1.6T Ethernet, pre-verified subsystems, successful ecosystem interoperability, and decades of expertise in developing and delivering the industry's broadest interface IP portfolio allow designers to confidently integrate the necessary functionality into their SoCs with less risk."

Synopsys Complete 1.6T Ethernet Solution

Synopsys' comprehensive IP solution, including new 1.6T MAC and PCS Ethernet controllers, 224G Ethernet PHY IP, and verification IP, accelerates time to market for AI and HPC networking chips. The complete 1.6T Ethernet IP solution optimizes hyperscale data center energy efficiency by reducing interconnect power consumption by up to 50% compared to existing SoC implementations. The new multi-channel, multi-rate Synopsys 1.6T Ethernet MAC and PCS Controllers decrease area by 50% and reduce latency by 40% by implementing a patented Reed-Solomon Forward Error Correction architecture, while helping ensure reliable data for Ethernet rates from 10G to 1.6T. The silicon-proven 224G Ethernet PHY IP delivers robust link performance with exceptional signal integrity and seamless ecosystem interoperability for multiple channel lengths. The industry's first Ethernet verification IP for up to 1.6T speeds, implemented in native SystemVerilog and Universal Verification Methodology, speeds time to first test.

Availability and Additional Resources

The Synopsys 1.6T Ethernet solution, including all components – 1.6T MAC and PCS Controller IP, 224G PHY IP for advanced processes, and Verification IP for 1.6T Ethernet – are available now.

About Synopsys

Catalyzing the era of pervasive intelligence, Synopsys, Inc. (Nasdaq: SNPS) delivers trusted and comprehensive silicon to systems design solutions, from electronic design automation to silicon IP and system verification and validation. We partner closely with semiconductor and systems customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.  Learn more at www.synopsys.com.

Editorial Contact:
Kelli Wheeler 
Synopsys, Inc. 
(518) 248-0780
Kelliw@synopsys.com
Corp-pr@synopsys.com 

Cision View original content to download multimedia:https://www.prnewswire.com/news-releases/synopsys-launches-industrys-first-complete-1-6t-ethernet-ip-solution-to-meet-high-bandwidth-needs-of-ai-and-hyperscale-data-center-chips-302074958.html

SOURCE Synopsys, Inc.

FAQ

What is the key highlight of Synopsys' new 1.6T Ethernet IP solution?

Synopsys' 1.6T Ethernet IP solution reduces interconnect power consumption by up to 50% compared to existing implementations.

How do the new multi-channel/multi-rate Ethernet controllers improve upon existing solutions?

The new controllers offer 1.6T support with up to 40% latency reduction and up to 50% area reduction compared to existing multi-rate 800G IP solutions.

What is the benefit of the silicon-proven 224G Ethernet PHY IP?

The 224G Ethernet PHY IP is customizable to support chip-to-chip, chip-to-module, and copper cable connections, optimizing power and performance tradeoffs.

How does Synopsys' verification IP for 1.6T Ethernet accelerate chip development?

The verification IP accelerates verification closure with a comprehensive set of protocol, methodology, and productivity features.

What are the key components of Synopsys' complete 1.6T Ethernet IP solution?

The solution includes new 1.6T MAC and PCS Ethernet controllers, 224G Ethernet PHY IP, and verification IP to accelerate time to market for AI and HPC networking chips.

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