Synopsys Announces Industry's First Ultra Ethernet and UALink IP Solutions to Connect Massive AI Accelerator Clusters
Synopsys has announced the industry's first Ultra Ethernet IP and UALink IP solutions designed to connect massive AI accelerator clusters. The Ultra Ethernet IP solution will enable up to 1.6 Tbps of bandwidth, connecting up to one million endpoints, while the UALink IP solution offers up to 200 Gbps throughput per lane, linking up to 1,024 accelerators.
These solutions address the growing demand for standards-based, high-bandwidth, and low-latency HPC and AI accelerator interconnects. Built on Synopsys' existing Ethernet and PCIe IP technology, which has enabled over 5,000 successful customer tapeouts, the new solutions are being developed in collaboration with industry leaders including AMD, Astera Labs, Juniper Networks, Tenstorrent, and XConn.
The Ultra Ethernet IP solution is scheduled for availability in first half 2025, while the UALink IP solution will be available in second half 2025.
Synopsys ha annunciato le prime soluzioni Ultra Ethernet IP e UALink IP del settore, progettate per connettere enormi cluster di acceleratori AI. La soluzione Ultra Ethernet IP consentirà una larghezza di banda fino a 1,6 Tbps, collegando fino a un milione di endpoint, mentre la soluzione UALink IP offre fino a 200 Gbps di throughput per corsia, collegando fino a 1.024 acceleratori.
Queste soluzioni rispondono alla crescente domanda di interconnessioni HPC e di acceleratori AI basate su standard, ad alta larghezza di banda e bassa latenza. Sviluppate sulla tecnologia Ethernet e PCIe IP esistente di Synopsys, che ha consentito oltre 5.000 tapeout di successo per i clienti, le nuove soluzioni sono in fase di sviluppo in collaborazione con leader del settore come AMD, Astera Labs, Juniper Networks, Tenstorrent e XConn.
La soluzione Ultra Ethernet IP è programmata per essere disponibile nella prima metà del 2025, mentre la soluzione UALink IP sarà disponibile nella seconda metà del 2025.
Synopsys ha anunciado las primeras soluciones de Ultra Ethernet IP y UALink IP en la industria, diseñadas para conectar grandes clústeres de aceleradores de IA. La solución Ultra Ethernet IP permitirá hasta 1.6 Tbps de ancho de banda, conectando hasta un millón de puntos finales, mientras que la solución UALink IP ofrece hasta 200 Gbps de rendimiento por vía, conectando hasta 1.024 aceleradores.
Estas soluciones abordan la creciente demanda de interconexiones HPC y de aceleradores de IA basadas en estándares, con alto ancho de banda y baja latencia. Basadas en la tecnología Ethernet y PCIe IP existente de Synopsys, que ha permitido más de 5,000 tapeouts exitosos para clientes, las nuevas soluciones se están desarrollando en colaboración con líderes de la industria como AMD, Astera Labs, Juniper Networks, Tenstorrent y XConn.
La solución Ultra Ethernet IP está programada para estar disponible en la primera mitad de 2025, mientras que la solución UALink IP estará disponible en la segunda mitad de 2025.
Synopsys는 대규모 AI 가속기 클러스터를 연결하기 위해 설계된 업계 최초의 Ultra Ethernet IP 및 UALink IP 솔루션을 발표했습니다. Ultra Ethernet IP 솔루션은 최대 1.6 Tbps의 대역폭을 제공하며, 최대 백만 개의 엔드포인트를 연결할 수 있습니다. UALink IP 솔루션은 레인당 최대 200 Gbps의 처리량을 제공하며, 최대 1,024개의 가속기를 연결합니다.
이 솔루션들은 표준 기반의 고대역폭 및 저지연 HPC 및 AI 가속기 인터커넥트에 대한 증가하는 수요를 충족합니다. Synopsys의 기존 이더넷 및 PCIe IP 기술을 기반으로 개발되었으며, 5,000건 이상의 성공적인 고객 테이프 아웃을 가능하게 했습니다. 새로운 솔루션은 AMD, Astera Labs, Juniper Networks, Tenstorrent 및 XConn과 같은 업계 리더들과 협력하여 개발되고 있습니다.
Ultra Ethernet IP 솔루션은 2025년 상반기에 출시될 예정이며, UALink IP 솔루션은 2025년 하반기에 출시될 예정입니다.
Synopsys a annoncé les premières solutions Ultra Ethernet IP et UALink IP de l'industrie, conçues pour connecter d'énormes clusters d'accélérateurs d'IA. La solution Ultra Ethernet IP permettra d'atteindre une bande passante allant jusqu'à 1,6 Tbps, en connectant jusqu'à un million de points de terminaison, tandis que la solution UALink IP offre un débit allant jusqu'à 200 Gbps par canal, reliant jusqu'à 1.024 accélérateurs.
Ces solutions répondent à la demande croissante d'interconnexions HPC et d'accélérateurs IA basées sur des normes, à haute bande passante et à faible latence. Basée sur la technologie Ethernet et PCIe IP existante de Synopsys, qui a permis plus de 5.000 tapeouts clients réussis, les nouvelles solutions sont développées en collaboration avec des leaders de l'industrie tels qu'AMD, Astera Labs, Juniper Networks, Tenstorrent et XConn.
La solution Ultra Ethernet IP est prévue pour la première moitié de 2025, tandis que la solution UALink IP sera disponible dans la seconde moitié de 2025.
Synopsys hat die ersten Ultra Ethernet IP und UALink IP Lösungen der Branche angekündigt, die zum Anschluss von massiven AI-Beschleuniger-Clustern entwickelt wurden. Die Ultra Ethernet IP-Lösung ermöglicht bis zu 1,6 Tbps Bandbreite und kann bis zu eine Million Endpunkte verbinden, während die UALink IP-Lösung bis zu 200 Gbps Durchsatz pro Leitung bietet und bis zu 1.024 Beschleuniger verbindet.
Diese Lösungen decken die wachsende Nachfrage nach standardbasierten, hochbandbreitfähigen und latenzarmen HPC- und AI-Beschleuniger-Interconnects ab. Entwickelt auf der bestehenden Ethernet- und PCIe-IP-Technologie von Synopsys, die über 5.000 erfolgreiche Kunden-Tapeouts ermöglicht hat, werden die neuen Lösungen in Zusammenarbeit mit Branchenführern wie AMD, Astera Labs, Juniper Networks, Tenstorrent und XConn entwickelt.
Die Ultra Ethernet IP-Lösung wird für die erste Jahreshälfte 2025 verfügbar sein, während die UALink IP-Lösung in der zweiten Jahreshälfte 2025 verfügbar sein wird.
- First-to-market with Ultra Ethernet and UALink IP solutions for AI clusters
- Ultra Ethernet IP enables massive scaling with 1.6 Tbps bandwidth
- UALink IP supports up to 200 Gbps per lane throughput
- Collaboration with major industry leaders (AMD, Juniper Networks, etc.)
- Built on proven technology with 5,000+ successful customer tapeouts
- Products won't be available until H1/H2 2025
Insights
This groundbreaking IP announcement represents a significant leap forward in AI infrastructure connectivity. The new Ultra Ethernet IP solution's capability to support 1.6 Tbps bandwidth and connect up to one million endpoints is revolutionary for large-scale AI deployments. The UALink IP's 200 Gbps per lane throughput addresses critical bottlenecks in AI accelerator clusters.
The collaboration with industry leaders like AMD, Juniper Networks and Astera Labs validates the technology's potential impact. Particularly noteworthy is the patented error correction implementation and the ability to scale to 1,024 AI accelerators, which could dramatically improve training efficiency for large language models.
This strategic move strengthens Synopsys' position in the booming AI chip infrastructure market. The timing is important as hyperscalers rush to build larger AI clusters for training increasingly complex models. With over 5,000 successful customer tapeouts in their Ethernet and PCIe IP portfolio, Synopsys has the credibility to capture significant market share in this emerging segment.
The planned 2025 release aligns with projected industry demands for next-generation AI infrastructure. The endorsements from major industry players and first-mover advantage in Ultra Ethernet and UALink IP solutions could translate to substantial revenue growth in the high-margin IP licensing business.
Best-in-Class Silicon IP Addresses Industry Need for Open Standard Solutions to Scale AI Accelerator Infrastructure
Highlights
- Synopsys Ultra Ethernet IP solution will enable up to 1.6 Tbps of bandwidth to connect up to one million endpoints
- Synopsys UALink IP solution will offer up to 200 Gbps throughput per lane, linking up to 1,024 accelerators
- New Ultra Ethernet and UALink IP is built on Synopsys' industry-leading Ethernet and PCIe IP, which together have enabled more than 5,000 successful customer tapeouts
- Industry leaders, including AMD, Astera Labs, Juniper Networks, Tenstorrent, and XConn are collaborating with Synopsys to scale the HPC and AI accelerator ecosystem
"For more than 25 years, Synopsys has been at the forefront of providing best-in-class IP solutions that enable designers to accelerate the integration of standards-based functionality," said Neeraj Paliwal, senior vice president of IP product management at Synopsys. "With the industry's first Ultra Ethernet and UALink IP, companies can get a head start on developing a new generation of high-performance chips and systems with broad interoperability to scale future AI and HPC infrastructure."
Synopsys Ultra Ethernet IP Solution Supports Scaling Out to One Million Endpoints
Advanced capabilities of the new Synopsys Ultra Ethernet IP solution include:
- IP solution to scale out backend networks: Consisting of PHY, MAC and PCS controller, and verification IP, the Synopsys Ultra Ethernet IP solution offers a low-risk path for designers developing systems that can support up to one million endpoints in a single network.
- Best-in-class 224G Ethernet PHY IP: The silicon-proven Synopsys 224G Ethernet PHY IP, which supports the Ultra Ethernet protocol, has demonstrated broad interoperability as shown at multiple tradeshows including ECOC, OFC, and DesignCon.
- Patented error correction implementation: The Synopsys Ultra Ethernet MAC and PCS controller IP provides up to 1.6 Tbps of bandwidth with ultra-low latency, enabling the real-time processing needed for AI workloads.
- Seamless integration: The MAC and PCS IP support an interface to the higher layers of the Ultra Ethernet stack providing a full silicon implementation for switches, AI accelerators and smart NICs.
- Accelerated verification and validation: The Synopsys Ultra Ethernet verification IP helps ensure protocol adherence to rapidly evolving standards, enabling faster and more efficient validation of AI and HPC systems.
"Juniper has already introduced the industry's first 800GbE capability with its PTX10002-36QDD Packet Transport Router, which utilizes our proprietary Express 5 ASIC with Synopsys Ethernet IP," said Debashis Basu, senior vice president of Juniper Engineering. "We will continue to partner with Synopsys and leverage the latest technologies from the Ultra Ethernet Consortium (UEC) to transition into the 1.6TbE era. This indicates our ongoing innovation in high-speed networking to achieve our goal to significantly improve scale, reliability, and performance in data center networks. This is particularly important as AI workloads continue to grow exponentially, making such networks much more efficient and cost-effective."
Synopsys UALink IP Solution Enables Massive Increases in AI Compute Capacity
Advanced capabilities of the new Synopsys UALink IP solution include:
- IP solution to scale up computing fabrics: Consisting of PHY, controller, and verification IP, the Synopsys UALink IP solution speeds time-to-market for designers developing systems that can support up to 1,024 AI accelerators.
- Efficient, high-speed data transfers: Engineered for data-intensive AI workloads, the low-power and high-bandwidth Synopsys UALink PHY IP provides 200 Gbps per lane.
- Latency-optimized with memory sharing capabilities: Synopsys UALink Controller IP helps mitigate critical bottlenecks of AI hardware infrastructure via shared memory access from accelerator to accelerator.
- Built-in protocol checks: The Synopsys UALink Verification IP, combined with Synopsys hardware-assisted verification solutions, provides quick and reliable verification for AI hardware.
"Synopsys has decades of expertise in contributing to the industry's essential interconnect standards and in delivering widely adopted high-speed interface IP," said Kurtis Bowman, chairperson of the board at UALink Consortium. "We appreciate Synopsys' commitment to enabling UALink IP to create a scalable, high-performance data center ecosystem for designers to meet the growing demands of AI models."
Additional Industry Leaders Collaborate with Synopsys to Enable AI Accelerator Interconnects at Scale
"Advancing AI technology requires industry-wide efforts to create high-performance solutions essential for the future of data centers," said Robert Hormuth, corporate vice president, architecture and strategy, data center solutions group at AMD. "The introduction of Synopsys' Ultra Ethernet and UALink IP, alongside AMD high-performance processors, highlights the commitment to create an open, robust, and scalable ecosystem for large-scale AI and high-performance computing."
"The progress of AI technology relies on industry collaboration to deliver scalable and power-efficient high-performance accelerator fabrics," said Chris Petersen, fellow, technology and ecosystems at Astera Labs. "New interconnect technologies such as UALink will help support the rapid growth and complexity of AI and HPC workloads. We congratulate Synopsys on the delivery of its new IP solutions to enable this critical connectivity ecosystem."
"Participating in defining and developing an open standards-based AI systems communications is an important part of Tenstorrent's charter. The low latencies and high bandwidths of the upcoming UEC and UALink standards will enable ultra-efficient interfaces supporting AI compute with multi-trillion parameter models," said David Bennett, chief customer officer at Tenstorrent. "Tenstorrent's RISC-V chips and Synopsys' new UALink and Ultra Ethernet IP will enable the largest AI accelerator clusters."
"To keep pace with the exponential growth in AI model parameters and compute requirements, hyperscalers need to address immense connectivity challenges," said Gerry Fan, CEO at XConn. "With XConn's UALink switches and Synopsys' new UALink IP, system architects can deploy high-performance, standards-compliant systems for future AI computing and networking architectures."
Availability & Additional Resources
The Synopsys Ultra Ethernet IP solution, including MAC and PCS, PHY, and verification IP, is scheduled to be available in the first half of 2025. The Synopsys UALink IP solution, including controller, PHY, and verification IP, is scheduled to be available in the second half of 2025.
- Learn more about Synopsys Ultra Ethernet IP
- Learn more about Synopsys UALink IP
- Blog: Enabling Massive AI Clusters with the Industry's First Ultra Ethernet and UALink IP Solutions
- Video: Scaling AI Networks with Synopsys Ultra Ethernet and UALink IP
About Synopsys
Catalyzing the era of pervasive intelligence, Synopsys, Inc. (Nasdaq: SNPS) delivers trusted and comprehensive silicon to systems design solutions, from electronic design automation to silicon IP and system verification and validation. We partner closely with semiconductor and systems customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com.
Editorial Contact
Kelli Wheeler
Synopsys, Inc.
(650) 584-5000
corp-pr@synopsys.com
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SOURCE Synopsys, Inc.
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