Synopsys and TSMC Collaborate to Accelerate 2nm Innovation for Advanced SoC Design with Certified Digital and Analog Design Flows
- Certified design flows achieving multiple tape-outs and adoption for design starts
- Broad IP portfolio in development to reduce integration risk and speed time to market
- AI-driven design technologies optimize N2 design for improved power, performance, and area
- Close collaboration with TSMC strengthens competitive advantage
- None.
Design Flow Achieved Multiple Successful Test Chip Tape-Outs on TSMC N2 Process; Broad IP Portfolio in Development to Speed Time to Market
Highlights:
- Synopsys' certified digital and analog design flows enhance quality of results for high-performance compute, mobile, and AI designs.
- Analog design migration flow, powered by Synopsys.ai™ EDA suite, enable rapid design migration across TSMC process nodes.
- Broad portfolio of Synopsys Interface IP and Foundation IP in development will shorten design time and help reduce integration risk.
"High quality-of-results and faster time to market for advanced SoC designs are hallmarks of TSMC's and Synopsys' longstanding collaboration," said Dan Kochpatcharin, head of Design Infrastructure Management Division at TSMC. "We work closely with our design ecosystem partners like Synopsys to deliver a full-spectrum of best-in-class solutions for TSMC's most advanced process technologies, providing our mutual customers a clear advantage in meeting the silicon demands of high-performance applications, along with a proven path to rapidly migrate their designs from node to node."
"The Synopsys digital and analog design flows for the TSMC N2 process represent a significant investment by Synopsys across the full EDA stack, helping designers jumpstart their N2 designs, differentiate their SoCs with increasingly better power, performance, and chip density, and accelerate their time to market," said Sanjay Bali, vice president of Strategy and Product Management for the EDA Group at Synopsys. "Our close collaboration with TSMC through every generation of TSMC's process technologies enables us to deliver unmatched EDA and IP solutions that customers need to innovate and strengthen their competitive advantage."
Efficient Reuse of Designs from Node to Node
The Synopsys analog flow enables efficient reuse of designs from node to node on TSMC advanced processes. As part of the certified EDA flows, Synopsys provides interoperable process design kits (iPDKs) and Synopsys IC Validator™ physical verification for full-chip physical signoff.
Availability
The certified EDA flows are available now.
- For information about the digital design flow, visit: Synopsys Digital Design Family
- For information about the analog design flow, visit: Synopsys Custom Design Family
Additional Resources
- For more information about the Synopsys AI-driven design technologies, including Synopsys DSO.ai™, visit www.synopsys.com/ai
- News Release: Synopsys and TSMC Advance Analog Design Migration with Reference Flow Across Advanced TSMC Processes
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As an S&P 500 company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and offers the industry's broadest portfolio of application security testing tools and services. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing more secure, high-quality code, Synopsys has the solutions needed to deliver innovative products. Learn more at www.synopsys.com.
Editorial Contact:
Kelli Wheeler
Synopsys, Inc.
(518) 248-0780
kelliw@synopsys.com
corp-pr@synopsys.com
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SOURCE Synopsys, Inc.
