Synopsys and TSMC Advance Analog Design Migration with Reference Flow Across Advanced TSMC Processes

Rhea-AI Summary

Synopsys announces AI-driven analog design migration flow across TSMC's advanced process technologies

Positive

• AI-driven design solution saves weeks of manual effort and increases design quality
• Interoperable process design kits enable early start on projects and cut turnaround time
• RF design reference flow accelerates RF designs

Negative

• None.

AI-Driven Analog Design Migration Flow, Powered by Synopsys.ai EDA Suite, Boosts Productivity for Analog and Mixed-Signal SoCs   

Highlights:

• AI-driven design solution enables circuit optimization, saving weeks of manual and iterative effort while increasing design quality.
• Interoperable process design kits for all advanced TSMC FinFET nodes help jumpstart analog designs.
• RF design reference flow developed by Synopsys, in collaboration with Ansys and Keysight, provides a complete solution for modern RFIC designs.

SUNNYVALE, Calif., Sept. 25, 2023 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced its analog design migration flow is enabled across TSMC's advanced process technologies, including N4P, N3E, and N2. The analog design migration flow, part of the Synopsys Custom Design Family, includes a machine learning-based schematic and template-based layout migration solution to speed up overall analog design migration tasks. As part of the design migration solution, the integrated parasitic-aware, AI-driven optimization technology helps overcome the manual and iterative effort typically required to tune analog designs to meet all specifications. Using the flow, engineers can optimize their design in the new technology node while shaving weeks off engineering time and effort.

"With the significant performance and power efficiency advantages of TSMC's most advanced process technologies, design teams can bring innovative chips to life that are in high demand for today's smart, connected, and compute-intensive applications," said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC. "Our long history of collaboration with Synopsys continues to benefit mutual customers who are migrating existing analog designs to next-generation TSMC processes, with productive and time to market gains."

"Increased chip complexities, engineering resource constraints, and tighter delivery windows are driving companies to AI-driven solutions to help accelerate quality of results and time to results," said Sanjay Bali, vice president of Strategy and Product Management for the EDA Group at Synopsys. "Our collaboration with TSMC on the analog design migration flow for TSMC's N4P, N3E, and N2 processes enables mutual customers to unlock massive productivity gains with efficient migration of their designs from node-to-node."

Enabling Efficient Migration of Analog and IP Designs

Last fall, Synopsys was recognized as a TSMC OIP Partner of the Year; among the achievements highlighted was the certified Synopsys Custom Design Family, which provides machine learning-based schematic and template-based layout migration capabilities for efficient reuse of existing IP when migrating analog designs across TSMC advanced nodes. Key components of the analog design migration flow include Synopsys Custom Compiler design and layout solution, Synopsys PrimeWave™ design environment, and Synopsys PrimeSim™ circuit simulation solution, which are enabled for all TSMC advanced FinFET technologies and deliver a performance advantage in SPICE, FastSPICE, and mixed-signal simulation.

Facilitating an Early Start on Designs

With the availability of interoperable process design kits (iPDKs) tuned to TSMC's N4P, N3E and N2 processes, analog design teams can start their projects earlier and be on a highly productive path. Mutual customers using the iPDKs can use the best-in-class tool in their flows, simplify the development flow, and cut turnaround time. In addition, an enabled RFIC reference flow for the TSMC N4P RF FinFET process, developed in partnership with Ansys and Keysight, is now available for TSMC customers to accelerate RF designs. The open RF design flow enables RF SoC design engineers to meet performance, power efficiency, and time-to-market requirements.

Availability  

The Synopsys analog design migration solution and Synopsys RF design solutions are available now for TSMC advanced processes.

• Learn more about the Custom Design Family: https://www.synopsys.com/implementation-and-signoff/custom-design-platform.html
• Learn more about RF design solutions: https://www.synopsys.com/rf-design.html
• Learn more about Custom QuickStart Kits https://www.synopsys.com/implementation-and-signoff/resources/videos/qsk-video-whitepaper.html

Additional Resources

• News Release: Synopsys and TSMC Collaborate to Accelerate 2nm Innovation for Advanced SoC Design with Certified Digital and Analog Design Flows

About Synopsys
Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As an S&P 500 company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and offers the industry's broadest portfolio of application security testing tools and services. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing more secure, high-quality code, Synopsys has the solutions needed to deliver innovative products. Learn more at www.synopsys.com.

Editorial Contact:         
Kelli Wheeler  
Synopsys, Inc.  
(518) 248-0780
kelliw@synopsys.com
corp-pr@synopsys.com

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SOURCE Synopsys