Rambus Expands High-Performance Memory Subsystem Offerings with HBM2E Solution on Samsung 14/11nm

Rhea-AI Summary

Rambus Inc. (NASDAQ: RMBS) has introduced its HBM2E memory interface subsystem, engineered for high-performance applications, including AI and HPC. This subsystem is validated on Samsung's advanced 14/11nm process, achieving speeds of 3.2 Gbps and delivering a remarkable 410 GB/s bandwidth. Joint efforts with Samsung enhance memory interface design and allow faster time to market for designers. The fully-integrated solution includes reference designs and expert support, aimed at reducing complexity and ensuring success in system implementations.

Positive

• Introduction of HBM2E memory interface subsystem validated on Samsung's 14/11nm process.
• Achieves operational speed of 3.2 Gbps, providing 410 GB/s bandwidth.
• Supports high-performance AI/ML and HPC applications.
• Fully-integrated solution helps reduce design complexity and speeds time to market.
• Includes reference designs and expert support to ensure successful implementations.

Negative

• None.

SAN JOSE, Calif., April 21, 2021 /PRNewswire/ -- Rambus Inc. (NASDAQ: RMBS), a provider of industry-leading chips and silicon IP making data faster and safer, today announced the Rambus HBM2E memory interface subsystem, consisting of a fully-integrated PHY and controller, is silicon proven on Samsung's advanced 14/11nm FinFET process. Leveraging over 30 years of signal integrity expertise, the Rambus solution operates up to 3.2 Gbps, delivering 410 GB/s of bandwidth. This performance meets the terabyte-scale bandwidth needs of accelerators targeting the most demanding AI/ML training and high-performance computing (HPC) applications.

"Our partnership with Rambus brings together industry-leading memory interface design expertise with Samsung's state-of-the-art process and packaging technologies," said Jongshin Shin, vice president of Design Platform Development at Samsung Electronics. "Designers of AI and HPC systems can implement platforms using HBM2E memory leveraging Samsung's advanced 14/11nm process to achieve unmatched levels of performance."

The fully-integrated, production-ready Rambus HBM2E memory subsystem runs at 3.2 Gbps and provides designers with substantial headroom for implementation. Rambus and Samsung teamed to validate the HBM2E PHY and Memory Controller IP in silicon using Samsung's 14/11nm process and advanced packaging technologies.

"With silicon operation up to 3.2 Gbps, customers can implement HBM2E memory subsystems with the confidence of ample margin for their designs," said Matt Jones, general manager of IP Cores at Rambus. "Our customers benefit from our comprehensive support that includes 2.5D package and interposer reference designs, helping ensure first-time-right implementations."

Benefits of the Rambus HBM2E Memory Interface (PHY and Controller):

• Achieves speed of 3.2 Gbps per pin, delivering a system bandwidth of 410 GB/s from a single HBM2E DRAM 3D device
• Fully-integrated and verified in silicon HBM2E PHY and Controller reduces ASIC design complexity and speeds time to market
• Includes 2.5D package and interposer reference design as part of IP license
• Provides access to Rambus system and SI/PI experts helping ASIC designers to ensure maximum signal and power integrity for devices and systems
• Features LabStation™ development environment that enables quick system bring-up, characterization and debug
• Supports high-performance applications including state-of-the-art AI/ML training and high-performance computing (HPC) systems

For more information on the Rambus Interface IP, including our PHYs and Controllers, please visit rambus.com/interface-ip.

Follow Rambus:
Company website: rambus.com
Rambus blog: rambus.com/blog
Twitter: @rambusinc
LinkedIn: www.linkedin.com/company/rambus
Facebook: www.facebook.com/RambusInc 

About Rambus Inc.
Rambus is a provider of industry-leading chips and silicon IP making data faster and safer. With over 30 years of advanced semiconductor experience, we are a pioneer in high-performance memory subsystems that solve the bottleneck between memory and processing for data-intensive systems. Whether in the cloud, at the edge or in your hand, real-time and immersive applications depend on data throughput and integrity. Rambus products and innovations deliver the increased bandwidth, capacity and security required to meet the world's data needs and drive ever-greater end-user experiences. For more information, visit rambus.com. 

Press Contact:
Cori Pasinetti
Rambus Corporate Communications
t: (650) 309-6226
cpasinetti@rambus.com

 

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SOURCE Rambus Inc.

FAQ

What is the Rambus HBM2E memory interface subsystem?

The Rambus HBM2E memory interface subsystem is a fully-integrated PHY and controller solution validated on Samsung's advanced 14/11nm process, achieving speeds of 3.2 Gbps and delivering 410 GB/s bandwidth.

When was the Rambus HBM2E memory interface announced?

Rambus announced the HBM2E memory interface subsystem on April 21, 2021.

What are the benefits of the Rambus HBM2E memory interface?

Benefits include high-speed operation at 3.2 Gbps, extensive bandwidth, reduced design complexity, included reference designs, and expert support for designers.

How does the Rambus partnership with Samsung help in design?

The partnership combines Rambus's memory interface expertise with Samsung's advanced process technologies, enabling unmatched performance for AI and HPC system designs.

What applications can benefit from Rambus's HBM2E memory subsystem?

The HBM2E memory subsystem is geared towards high-performance applications including AI/ML training and high-performance computing.