GBT’s Automatic Correction of Integrated Circuits Connectivity Mismatches Non-Provisional Patent Application has been Approved for Prioritized Examination
GBT Technologies Inc. (OTC PINK: GTCH) has received a fast track approval for its patent application focused on the automatic correction of electrical connectivity mismatches in Integrated Circuits (IC). Filed on August 3, 2022, this technology aims to streamline the Layout Versus Schematic (LVS) checking process, making it more efficient for advanced nanometer nodes (5nm and below). The company plans to enhance IC design automation and address challenges in semiconductor manufacturing, though there is no guarantee of successful development or implementation of this system.
- Fast track approval from the USPTO for patent application #17880055.
- Technology aims to automate the correction of IC electrical connectivity mismatches, improving design efficiency.
- Potential to significantly reduce design cycle time for advanced nanometer nodes (5nm and below).
- No guarantee of successful research, development, or implementation of the automated LVS correction system.
- Company needs to secure additional capital for research and development efforts.
SAN DIEGO, Sept. 14, 2022 (GLOBE NEWSWIRE) -- GBT Technologies Inc. (OTC PINK: GTCH) ("GBT” or the “Company”) has been granted a fast track request by the United Stated Patent and Trademark Office for its nonprovisional patent application pertaining to the automatic correction of Integrated Circuits (IC) electrical connectivity mismatches. The patent application will undergo prioritized examination to accelerate the process. The original patent was filed on August 3, 2022 (application #17880055) to protect programmatic methodologies and algorithms to automate integrated circuits electrical connectivity mismatches correction, with the goal of shortening microchip’s design cycle, particularly for advanced nanometer nodes of 5nm and below.
Layout Versus Schematic (LVS) checking process compares the IC’s mask with the schematic netlist to determine if they match. The comparison results are considered ‘pass’ (or ‘clean’) if all the electronic devices and connectivity that are described in the schematic match the devices and connectivity in the layout. A ‘fail’ (or ‘dirty’) results means connectivity and/or devices mismatches. Particularly with Analog or MIXED layout types, these mismatches would have to be fixed manually which is a tedious, time consuming, manual design work. A layout designer would have to debug the results, identifying the wrong electrical connections and/or device mismatches, and make the necessary layout modifications to achieve a ‘clean’ comparison.
GBT’s non-provisional patent application seeks to protect an algorithmic system and method to perform this process automatically. With a click of a button, the system is designed to read the IC’s schematic and layout data, compare the devices and electrical connectivity (wiring) and in case of mismatches detection, disconnect the faulty wires, and re-connect them in the layout to achieve a ‘clean’ LVS. The system is designed to automatically correct the layout, without causing any other LVS, geometrical (DRC), Reliability Verification (RV), and DFM (Design for Manufacturing) violations.
“We requested to expedite our LVS Automatic Correction nonprovisional patent (internal code name: ‘Sigma’) as we believe that it may have the capability to potentially impact the IC design world. GBT predicts a global growth in the semiconductor arena in the next decade and plans to invest vast efforts in this domain. Especially for advanced nodes, we believe there will be a need for productivity enhancement EDA technology to catch up with physics that dictates IC’s manufacturing processes. Small nodes, like 5nm and 3nm and below, are expected to create a whole world of challenges and an intelligent, efficient solutions are needed. We are working on programmatical approach to provide design automation solutions, identifying weak spots and bottlenecks within the IC layout design arena, and providing algorithmic methodologies to overcome challenges. One of the major verification processes within IC design cycle is LVS; Layout-vs-Schematic. In this process the physical IC layout is compared to its correspondence electrical schematic. This comparison process may result in connection mismatches between the schematic diagram and the mask layout data, particularly with Analog, RF, and MIXED layout types. A mismatch typically means a faulty electrical connection in the mask layout database that does not match its corresponding wiring in the schematic diagram. This may cause a circuit malfunction or wrong functional outcome. A correction of electrical connectivity mismatches within IC data can be a significant time-consuming process, especially with advanced nanometer chips, like 5nm and below, that may include billions of transistors. The technology underlying our non-provisional patent application presents an automated LVS correction system to analyze the data of an entire chip, checks for electrical connectivity mismatches and Auto-Correcting them with a click of a button. It’s a major challenge to perform such an operation programmatically and we are using advanced mathematics and AI technology to address the vast amount of data processing, complex mathematical analysis, concluding possible solutions, and executing auto-corrections. We consider this IP as one of GBT’s innovative IC design productivity enhancement technology, and plan to pursuit further R&D efforts in it in the future” stated Danny Rittman, the Company’s CTO.
There is no guarantee that the Company will be successful in researching, developing or implementing this system. In order to successfully implement this concept, the Company will need to raise adequate capital to support its research and, if successfully researched, developed and granted regulatory approval, the Company would need to enter into a strategic relationship with a third party that has experience in manufacturing, selling and distributing this product. There is no guarantee that the Company will be successful in any or all of these critical steps.
About Us
GBT Technologies, Inc. (OTC PINK: GTCH) (“GBT”) (http://gbtti.com) is a development stage company which considers itself a native of Internet of Things (IoT), Artificial Intelligence (AI) and Enabled Mobile Technology Platforms used to increase IC performance. GBT has assembled a team with extensive technology expertise and is building an intellectual property portfolio consisting of many patents. GBT’s mission, to license the technology and IP to synergetic partners in the areas of hardware and software. Once commercialized, it is GBT’s goal to have a suite of products including smart microchips, AI, encryption, Blockchain, IC design, mobile security applications, database management protocols, with tracking and supporting cloud software (without the need for GPS). GBT envisions this system as a creation of a global mesh network using advanced nodes and super performing new generation IC technology. The core of the system will be its advanced microchip technology; technology that can be installed in any mobile or fixed device worldwide. GBT’s vision is to produce this system as a low cost, secure, private-mesh-network between all enabled devices. Thus, providing shared processing, advanced mobile database management and sharing while using these enhanced mobile features as an alternative to traditional carrier services.
Forward-Looking Statements
Certain statements contained in this press release may constitute "forward-looking statements". Forward-looking statements provide current expectations of future events based on certain assumptions and include any statement that does not directly relate to any historical or current fact. Actual results may differ materially from those indicated by such forward-looking statements because of various important factors as disclosed in our filings with the Securities and Exchange Commission located at their website ( http://www.sec.gov). In addition to these factors, actual future performance, outcomes, and results may differ materially because of more general factors including (without limitation) general industry and market conditions and growth rates, economic conditions, governmental and public policy changes, the Company’s ability to raise capital on acceptable terms, if at all, the Company’s successful development of its products and the integration into its existing products and the commercial acceptance of the Company’s products. The forward-looking statements included in this press release represent the Company's views as of the date of this press release and these views could change. However, while the Company may elect to update these forward-looking statements at some point in the future, the Company specifically disclaims any obligation to do so. These forward-looking statements should not be relied upon as representing the Company's views as of any date subsequent to the date of the press release.
Contact:
Dr. Danny Rittman, CTO
press@gopherprotocol.com
FAQ
What is the purpose of GBT Technologies' recent patent application?
When was the patent filed by GBT Technologies?
What is the significance of the fast track approval received by GBT Technologies?
What challenges does GBT Technologies aim to address with its technology?
Is there a guarantee that GBT Technologies will succeed in developing the new technology?
