GBT develops Gate-All-Around FET (GAA FET) support for its integrated circuits, productivity enhancement, EDA technology
GBT Technologies is advancing its EDA technology by incorporating Gate-All-Around FET (GAA FET) support into its tools, enhancing the design and manufacturing of integrated circuits (ICs). This development aims to streamline the design process, targeting the upcoming 2nm node and beyond. The company anticipates that this will improve performance and reduce power consumption while addressing challenges posed by traditional FinFET structures. However, the success of this initiative hinges on securing adequate funding and forming strategic partnerships for manufacturing and distribution.
- Incorporating GAA FET support may enhance operational efficiency in IC design.
- Potential reductions in design time for upcoming 2nm chips could give GBT a competitive edge.
- The company may face challenges related to securing funding needed for development.
- Success is contingent on forming strategic partnerships, which are not guaranteed.
Starting with its interactive, early detection and elimination of IC’s layout design rule violations program.
SAN DIEGO, April 12, 2022 (GLOBE NEWSWIRE) -- GBT Technologies Inc. (OTC PINK: GTCHD) ("GBT” or the “Company”), is developing Gate-All-Around FET (GAA FET) support for its integrated circuits, productivity enhancement EDA technology. The support for the Gate-All-Around FET device will be added to all GBT’s EDA tools, starting with its interactive, advice and correction of design rule violations software. This tool works on Integrated Circuit (IC) layout data, checking manufacturing geometrical and electrical design rules correctness during the construction of an IC layout, thus creating Rule-Aware mask design environment. As the microchip’s industry is accelerating towards the new 5nm and 3nm processes, vast amount of design and manufacturing efforts are invested in the next generation; 2nm node and beyond. Foundries and major chip design firms are facing numerous challenges as well as upcoming crucial uncertainties. The traditional FinFet device is planned to be replaced, starting at 3nm, by a new promising device called the ‘Gate-All-Around FET’ device. This innovative device is considered to be a superior CMOS device in terms of conductivity, scaling, and electrical characteristics. GAA FET’s performance is expected to be significantly improved, with the goal of power consumption reduction, which makes it attractive for IC design companies to stay ahead of the domain’s competition. GBT’s visual, design rule detection and correction program is operating on an IC layout database, identifying violations, and performing the necessary correction, ensuring a correct-by-construction IC design environment. This approach could save significant amount of the global project’s design time by early identification and elimination of design’s violations and flaws. GBT believes that by adding GAA FET support, design time could be reduced especially with advanced upcoming nanometer chips of 2nm and beyond. GBT plans to incorporate GAA FET support within all its EDA software tools in order to remain at the forefront of the IC design arena.
"Fundamentally, today’s advanced chips are having smaller devices with smaller geometries. The silicon areas become more compact and crowded which impacts performance, power consumption and reliability. GAA FET technology is expected to provide performance enhancement with lower power consumption, which we believe makes it attractive for design firms. Another important aspect is that GAA FET relaxes some of the problems introduced by the traditional FinFETS. The new transistor structure is designed to provide stronger device gate control which would enable better conductivity and improved electrical characteristics. This is an important factor because at the smaller nodes, we are noticing more variability, particularly for memories. But with new technologies, typically comes uncertainty. With GAA FET we can expect higher potential for variability and design rule challenges, especially with today’s billions of transistors and advanced functionalities ICs. The ever-going demand to consume minimal power and to operate with high performance using GAA FET, could become a major obstacle for design firms, delaying milestones and timelines. GBT plans to develop GAA FET support for all its EDA productivity enhancement software tools with the goal of saving significant design time, enabling IC designers to maintain competitive schedules. We are going to start with our interactive identification and correction of design rule violations program. This tool operates during the construction of an IC layout, providing an on-the-fly feedback about violations. The tool also offers automatic correction of the detected violation and could save major project’s design time. Without the appropriate level of geometrical accuracy within an affordable time frame designers might need many extra months to reach the desired signoff schedule. Design Rule identification and correction process is a critical step during signoff, and without an intelligent productivity technology an enormous amount of pressure is put on designers to achieve design closure in a timely manner. Supporting GAA FET technology will enable IC designers to achieve design closure in a timely manner, meeting or shortening desired schedules and time to market milestones” provided Danny Rittman, the Company’s CTO.
There is no guarantee that the Company will be successful in researching, developing or implementing this system. In order to successfully implement this concept, the Company will need to raise adequate capital to support its research and, if successfully researched and fully developed, the Company would need to enter into a strategic relationship with a third party that has experience in manufacturing, selling and distributing this product. There is no guarantee that the Company will be successful in any or all of these critical steps.
About Us
GBT Technologies, Inc. (OTC PINK: GTCHD) (“GBT”) (http://gbtti.com) is a development stage company which considers itself a native of Internet of Things (IoT), Artificial Intelligence (AI) and Enabled Mobile Technology Platforms used to increase IC performance. GBT has assembled a team with extensive technology expertise and is building an intellectual property portfolio consisting of many patents. GBT’s mission, to license the technology and IP to synergetic partners in the areas of hardware and software. Once commercialized, it is GBT’s goal to have a suite of products including smart microchips, AI, encryption, Blockchain, IC design, mobile security applications, database management protocols, with tracking and supporting cloud software (without the need for GPS). GBT envisions this system as a creation of a global mesh network using advanced nodes and super performing new generation IC technology. The core of the system will be its advanced microchip technology; technology that can be installed in any mobile or fixed device worldwide. GBT’s vision is to produce this system as a low cost, secure, private-mesh-network between all enabled devices. Thus, providing shared processing, advanced mobile database management and sharing while using these enhanced mobile features as an alternative to traditional carrier services.
Forward-Looking Statements
Certain statements contained in this press release may constitute "forward-looking statements". Forward-looking statements provide current expectations of future events based on certain assumptions and include any statement that does not directly relate to any historical or current fact. Actual results may differ materially from those indicated by such forward-looking statements because of various important factors as disclosed in our filings with the Securities and Exchange Commission located at their website ( http://www.sec.gov). In addition to these factors, actual future performance, outcomes, and results may differ materially because of more general factors including (without limitation) general industry and market conditions and growth rates, economic conditions, governmental and public policy changes, the Company’s ability to raise capital on acceptable terms, if at all, the Company’s successful development of its products and the integration into its existing products and the commercial acceptance of the Company’s products. The forward-looking statements included in this press release represent the Company's views as of the date of this press release and these views could change. However, while the Company may elect to update these forward-looking statements at some point in the future, the Company specifically disclaims any obligation to do so. These forward-looking statements should not be relied upon as representing the Company's views as of any date subsequent to the date of the press release.
Contact:
Dr. Danny Rittman, CTO
press@gopherprotocol.com
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