Cadence RFIC Solutions Support TSMC N6RF Design Reference Flow

Rhea-AI Summary

Cadence Design Systems has announced a collaboration with TSMC to enhance innovation in mobile, 5G, and wireless applications through the N6RF design enablement. The newly developed process design kit (PDK) is aiding mutual customers in utilizing the Cadence RFIC solutions. This partnership optimizes several tools, including the Cadence Virtuoso Schematic Editor, facilitating effective design processes and improving performance, power efficiency, and reliability. The collaboration aims to streamline the design flow, aiding clients in reaching productivity goals faster.

Positive

• Collaboration with TSMC accelerates mobile, 5G, and wireless innovation.
• New PDK supports mutual customers in using Cadence RFIC solutions.
• Integration of tools enhances design efficiency and reduces errors.

Negative

• None.

Highlights:

• Cadence and TSMC collaborate on N6RF design enablement to accelerate innovation in mobile, 5G and wireless applications
• Joint customers are designing with the new PDK based on the N6RF design flow

SAN JOSE, Calif.--(BUSINESS WIRE)-- Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Cadence^® RFIC solutions are enabled to support TSMC’s N6RF Design Reference Flow and process design kit (PDK) to accelerate mobile, 5G and wireless innovation. Through the ongoing collaboration between Cadence and TSMC, mutual customers are already designing with the Cadence solutions for TSMC’s latest N6RF CMOS semiconductor technology.

The Cadence RFIC solutions support the Cadence Intelligent System Design^™ strategy, enabling system-on-chip (SoC) design excellence. To learn more about Cadence RFIC solutions, visit www.cadence.com/go/rfrfic.

Optimized for TSMC’s N6RF process technology, the Cadence Virtuoso^® Schematic Editor, Virtuoso ADE Suite and the integrated Spectre^® X Simulator and RF option are included in the RF Design Reference Flow. Customers can benefit from several key features, which enable them to effectively manage corner simulations, perform statistical analyses and achieve design centering and circuit optimization. Additionally, the flows offer seamless integration between the Cadence EMX^® Planar 3D Solver and the Virtuoso Layout Suite EXL implementation environment, which enables designers to streamline EM modeling tasks and leverage automation to stitch S-parameter models into the golden design schematic for RF simulations automatically.

For post-layout analysis, the S-parameter models are layered into Cadence Quantus^™ Extraction Solution results for high-fidelity RF signoff circuit and EM-IR simulations. Overall, the new Cadence RFIC full flow offers an efficient methodology that lets engineers achieve design goals—performance, power efficiency and reliability—in a single, tightly integrated design environment.

“Through our ongoing collaboration with Cadence, we’re making it easier for customers to achieve their productivity goals using the jointly developed design flow and our advanced N6RF process technology, which offers significant performance and power efficiency boosts,” said Suk Lee, vice president of the Design Infrastructure Management Division at TSMC. “With the availability of the new PDK, those creating next-generation mobile, 5G, and wireless designs can adopt our technologies quickly and accelerate the path to advanced-node innovation.”

“The comprehensive Cadence RFIC solutions cover all aspects of RF design—from RF custom passive device generation and modeling to EM-IR analysis with self-heating. With this unified flow, customers can focus on innovative design, rather than spending time managing disparate, error-prone toolsets,” said Tom Beckley, senior vice president and general manager in the Custom IC & PCB Group at Cadence. “By working closely with TSMC, our customers have access to the advanced capabilities included with TSMC’s N6RF process technology and the RF design reference flow, enabling them to achieve SoC design excellence and deliver competitive designs to market much more efficiently.”

About Cadence

Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For eight years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.

© 2022 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

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Source: Cadence Design Systems, Inc.

FAQ

What is the impact of Cadence's collaboration with TSMC on CDNS stock?

The partnership aims to accelerate innovation in mobile and wireless applications, potentially benefiting CDNS stock by attracting more customers and enhancing market competitiveness.

What new technology is Cadence introducing with TSMC's N6RF design flow?

Cadence is introducing a new process design kit (PDK) optimized for TSMC's N6RF CMOS semiconductor technology.

How do Cadence's RFIC solutions improve design processes for customers?

The RFIC solutions streamline various stages of design, enhance integration, and support better performance and efficiency, thus improving overall productivity.

What are the key features of the Cadence RFIC solutions?

Key features include corner simulations, statistical analyses, design centering, and circuit optimization, which help manage complex RF designs.