Cadence Delivers New Design Flows Based on the Integrity 3D-IC Platform in Support of TSMC 3Dblox™ Standard

Rhea-AI Summary

Cadence Design Systems has launched new design flows for its Integrity 3D-IC platform, optimized for the TSMC 3Dblox standard. This initiative enhances the platform’s integration with TSMC’s latest 3DFabric technologies, facilitating rapid design of advanced multi-die packages for 5G, AI, and IoT applications. Key features include 3D routability-driven bump assignment, hierarchical bump resource planning, and improved thermal analysis capabilities. Cadence aims to resolve customer challenges in 3D-IC design, accelerating their product development timelines.

Positive

• Launch of new design flows for the Integrity 3D-IC platform enhances compatibility with TSMC 3D technologies.
• Improved design quality and reduction in turnaround time for complex 3D-ICs.
• Customer ability to accelerate development for emerging tech such as 5G and AI.

Negative

• None.

Highlights:

• The Cadence Integrity 3D-IC platform, a complete solution certified for all the latest TSMC 3DFabric^™ offerings, combines system planning, packaging, and system-level analysis, providing a seamless design creation and signoff flow
• Flows fine-tuned to support 3Dblox^™, which speeds 3D front-end design partitioning in complex systems
• Cadence and TSMC technologies improve design quality and accelerate turnaround time for 3D-ICs used in 5G, AI, hyperscale computing, IoT and mobile applications

SAN JOSE, Calif.--(BUSINESS WIRE)-- Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced new design flows based on the Cadence^® Integrity^™ 3D-IC platform to support the TSMC 3Dblox^™ standard for 3D front-end design partitioning in complex systems. Through this latest collaboration, the Cadence flows are optimized for all of TSMC’s latest 3DFabric^™ offerings, including Integrated Fan-Out (InFO), Chip-on-Wafer-on-Substrate (CoWoS^®) and System-on-Integrated-Chips (TSMC-SoIC^® ) technologies. By using these design flows, customers can accelerate the development of advanced multi-die package designs for emerging 5G, AI, mobile, hyperscale computing and IoT applications.

The Cadence Integrity 3D-IC platform combines system planning, packaging, and system-level analysis and is a complete solution certified for use with the TSMC 3DFabric and the 3Dblox 1.5 specification. The flows based on this platform incorporate several new features like 3D routability-driven bump assignment and hierarchical bump resource planning. 3Dblox, which is inherently supported by the Integrity 3D-IC platform, provides a seamless interface for Cadence system analysis tools for early power delivery network (PDN) and thermal analysis via the Cadence Voltus^™ IC Power Integrity Solution and Celsius^™ Thermal Solver system analysis tools; extraction and static timing analysis via the Cadence Quantus^™ Extraction Solution and Tempus^™ Timing Signoff Solution; and system-level layout versus schematic (LVS) checks via the Cadence Pegasus^™ Verification System.

“3D-IC technology is key to meeting the performance, physical size, and power consumption requirements to enable next-generation HPC and mobile applications,” said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC. “By continuing our collaboration with Cadence, we’re enabling customers to leverage our comprehensive 3DFabric technologies and the Cadence flows that support our 3Dblox standard, so they can significantly improve 3D-IC design productivity and speed time to market.”

“The Cadence flows based on the Integrity 3D-IC platform incorporate everything a customer needs to quickly design a leading-edge 3D-IC using TSMC’s latest 3DFabric technologies,” said Dr. Chin-Chi Teng, senior vice president and general manager in the Digital & Signoff Group at Cadence. “Through our extensive work with TSMC, we’re jointly resolving the 3D-IC design challenges our customers regularly face, putting them on an accelerated path to bring innovative designs to life.”

The Cadence Integrity 3D-IC platform, including Allegro X packaging technologies, is part of the company’s broader 3D-IC offering and aligns with the Cadence Intelligent System Design^™ strategy, enabling system-on-chip (SoC) design excellence. The Cadence reference flows and tutorials are available on TSMC Online now, and more information on the Integrity 3D-IC platform can be found at www.cadence.com/go/integrity3dblox.

About Cadence

Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For nine years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.

© 2023 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

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Source: Cadence Design Systems, Inc.

FAQ

What is the new launch by Cadence Design Systems on the Integrity 3D-IC platform?

Cadence has launched new design flows optimized for the Integrity 3D-IC platform, supporting TSMC's 3Dblox standard.

How does the new Integrity 3D-IC platform affect design processes?

The Integrity 3D-IC platform enhances design processes by improving quality and accelerating turnaround times for complex systems.

What technologies does the Integrity 3D-IC platform support?

The platform supports various TSMC 3DFabric technologies, including Integrated Fan-Out and Chip-on-Wafer-on-Substrate.

What industries benefit from the new design flows launched by Cadence?

Industries including 5G communications, AI, mobile, hyperscale computing, and IoT will benefit from the new design flows.